In ext4, the file inode can store up to 4 extents. If a file requires
more (due to size or fragmentation), an extent index tree is used.
Currently, u-boot reads a node from each level of the extent tree
for every block read, which is very inefficient when extent tree
depth is > 0.
This patch adds a cache for the extent tree. We cache the 1
most-recently-seen node at each extent tree level. The typical workload
is sequential block access, so once we leave a given tree node, it will
not be revisited. Therefore, it makes sense to just cache one node
per tree level.
Cached blocks are lazily allocated. The typical case is extent tree
depth = 0, in which case no caching is needed and no allocations will
occur.
For files with extent tree depth = 1, this patch produces a ~10x
improvement in read speed. For deeper extent trees, the improvement is
larger. On my test device, a 3MB file which previously took 9s to read
now takes 150ms.
Cache size is configurable with CONFIG_EXT4_EXTENT_CACHE_SIZE. However
the default of 5 (the maximum depth of well-formed extent trees) is
recommended.
Signed-off-by: Evan Thompson <evan.thompson@flukenetworks.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Cherry-picked-by: Alexandre Bard <alexandre.bard@netmodule.com>
BugzID: 57904
#
# Xilinx ZYNQ U-Boot
#
# (C) Copyright 2013 Xilinx, Inc.
#
# SPDX-License-Identifier: GPL-2.0+
#
1. About this
This document describes the information about Xilinx Zynq U-Boot -
like supported boards, ML status and TODO list.
2. Zynq boards
Xilinx Zynq-7000 All Programmable SoCs enable extensive system level
differentiation, integration, and flexibility through hardware, software,
and I/O programmability.
* zc702 (single qspi, gem0, mmc) [1]
* zc706 (dual parallel qspi, gem0, mmc) [2]
* zed (single qspi, gem0, mmc) [3]
* microzed (single qspi, gem0, mmc) [4]
* zc770
- zc770-xm010 (single qspi, gem0, mmc)
- zc770-xm011 (8 or 16 bit nand)
- zc770-xm012 (nor)
- zc770-xm013 (dual parallel qspi, gem1)
3. Building
ex. configure and build for zc702 board
$ make zynq_zc702_config
$ make
4. Bootmode
Zynq has a facility to read the bootmode from the slcr bootmode register
once user is setting through jumpers on the board - see page no:1546 on [5]
All possible bootmode values are defined in Table 6-2:Boot_Mode MIO Pins
on [5].
board_late_init() will read the bootmode values using slcr bootmode register
at runtime and assign the modeboot variable to specific bootmode string which
is intern used in autoboot.
SLCR bootmode register Bit[3:0] values
#define ZYNQ_BM_NOR 0x02
#define ZYNQ_BM_SD 0x05
#define ZYNQ_BM_JTAG 0x0
"modeboot" variable can assign any of "norboot", "sdboot" or "jtagboot"
bootmode strings at runtime.
5. Mainline status
- Added basic board configurations support.
- Added zynq u-boot bsp code - arch/arm/cpu/armv7/zynq
- Added zynq boards named - zc70x, zed, microzed, zc770_xm010/xm011/xm012/xm013
- Added zynq drivers:
serial - drivers/serial/serial_zynq.c
net - drivers/net/zynq_gem.c
mmc - drivers/mmc/zynq_sdhci.c
spi - drivers/spi/zynq_spi.c
qspi - drivers/spi/zynq_qspi.c
i2c - drivers/i2c/zynq_i2c.c
nand - drivers/mtd/nand/zynq_nand.c
- Done proper cleanups on board configurations
- Added basic FDT support for zynq boards
- d-cache support for zynq_gem.c
6. TODO
- Add FDT support on individual drivers
[1] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm
[2] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm
[3] http://zedboard.org/product/zedboard
[4] http://zedboard.org/product/microzed
[5] http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
--
Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Sun Dec 15 14:52:41 IST 2013
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