31 lines
		
	
	
		
			693 B
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			31 lines
		
	
	
		
			693 B
		
	
	
	
		
			C
		
	
	
	
| /*
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|  * Tegra pulse width frequency modulator definitions
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|  *
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|  * Copyright (c) 2011 The Chromium OS Authors.
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| 
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| #ifndef __ASM_ARCH_TEGRA_PWM_H
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| #define __ASM_ARCH_TEGRA_PWM_H
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| 
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| /* This is a single PWM channel */
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| struct pwm_ctlr {
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| 	uint control;		/* Control register */
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| 	uint reserved[3];	/* Space space */
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| };
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| 
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| #define PWM_NUM_CHANNELS	4
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| 
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| /* PWM_CONTROLLER_PWM_CSR_0/1/2/3_0 */
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| #define PWM_ENABLE_SHIFT	31
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| #define PWM_ENABLE_MASK	(0x1 << PWM_ENABLE_SHIFT)
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| 
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| #define PWM_WIDTH_SHIFT	16
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| #define PWM_WIDTH_MASK		(0x7FFF << PWM_WIDTH_SHIFT)
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| 
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| #define PWM_DIVIDER_SHIFT	0
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| #define PWM_DIVIDER_MASK	(0x1FFF << PWM_DIVIDER_SHIFT)
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| 
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| #endif	/* __ASM_ARCH_TEGRA_PWM_H */
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