371 lines
7.9 KiB
Plaintext
371 lines
7.9 KiB
Plaintext
/*
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* Copyright 2017
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* Lukasz Majewski, DENX Software Engineering, lukma@denx.de
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include "imx6q.dtsi"
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/ {
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model = "Liebherr (LWN) display5 i.MX6 Quad Board";
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compatible = "lwn,display5", "fsl,imx6q";
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memory@10000000 {
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device_type = "memory";
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reg = <0x10000000 0x40000000>;
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};
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};
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&ecspi2 {
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cs-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs &pinctrl_ecspi2_flwp>;
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status = "okay";
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s25fl256s: flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <40000000>;
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reg = <0>;
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partition@0 {
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label = "SPL (spi)";
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reg = <0x0 0x20000>;
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read-only;
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};
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partition@1 {
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label = "u-boot (spi)";
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reg = <0x20000 0x100000>;
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read-only;
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};
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partition@2 {
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label = "uboot-env (spi)";
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reg = <0x120000 0x10000>;
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};
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partition@3 {
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label = "uboot-envr (spi)";
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reg = <0x130000 0x10000>;
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};
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partition@4 {
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label = "linux-recovery (spi)";
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reg = <0x140000 0x800000>;
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};
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partition@5 {
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label = "swupdate-fitImg (spi)";
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reg = <0x940000 0x400000>;
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};
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partition@6 {
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label = "swupdate-initramfs (spi)";
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reg = <0xD40000 0x800000>;
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};
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};
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};
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&ecspi3 {
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cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs &pinctrl_ecspi3_flwp>;
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status = "okay";
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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phy-handle = <ðernet_phy0>;
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phy-mode = "rgmii-id";
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethernet_phy0: ethernet-phy@0 {
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compatible = "marvell,88E1510";
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device_type = "ethernet-phy";
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/* Set LED0 control: */
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/* On - Link, Blink - Activity, Off - No Link */
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marvell,reg-init = <3 0x10 0 0x1011>;
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max-speed = <100>;
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reg = <0>;
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};
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};
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};
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&i2c1 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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codec: tfa9879@6c {
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#sound-dai-cells = <0>;
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compatible = "nxp,tfa9879";
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reg = <0x6C>;
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};
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};
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&i2c2 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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};
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&i2c3 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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at24@50 {
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compatible = "atmel,24c256";
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pagesize = <64>;
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reg = <0x50>;
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};
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pfuze100: pmic@8 {
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compatible = "fsl,pfuze100";
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reg = <0x08>;
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regulators {
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sw1a_reg: sw1ab {
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1875000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw1c_reg: sw1c {
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1875000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw2_reg: sw2 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <3950000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw3a_reg: sw3a {
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regulator-min-microvolt = <400000>;
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regulator-max-microvolt = <1975000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw3b_reg: sw3b {
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regulator-min-microvolt = <400000>;
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regulator-max-microvolt = <1975000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw4_reg: sw4 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <3300000>;
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};
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swbst_reg: swbst {
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5150000>;
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};
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snvs_reg: vsnvs {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <3000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vref_reg: vrefddr {
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regulator-boot-on;
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regulator-always-on;
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};
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vgen1_reg: vgen1 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1550000>;
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};
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vgen2_reg: vgen2 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1550000>;
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};
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vgen3_reg: vgen3 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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};
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vgen4_reg: vgen4 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen5_reg: vgen5 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen6_reg: vgen6 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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};
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};
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&uart4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart4>;
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uart-has-rtscts;
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status = "okay";
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};
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&uart5 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart5>;
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status = "okay";
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};
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&usdhc4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc4>;
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bus-width = <8>;
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non-removable;
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status = "okay";
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};
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&iomuxc {
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pinctrl_ecspi2: ecspi2grp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x100b1
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MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI 0x100b1
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MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK 0x100b1
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>;
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};
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pinctrl_ecspi2_cs: ecspi2csgrp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 0x100b1
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>;
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};
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pinctrl_ecspi2_flwp: ecspi2flwpgrp {
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fsl,pins = <
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MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
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>;
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};
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pinctrl_ecspi3: ecspi3grp {
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fsl,pins = <
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MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
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MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
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MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
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>;
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};
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pinctrl_ecspi3_cs: ecspi3csgrp {
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fsl,pins = <
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MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x1b0b0
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>;
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};
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pinctrl_ecspi3_flwp: ecspi3flwpgrp {
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fsl,pins = <
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MX6QDL_PAD_DISP0_DAT6__GPIO4_IO27 0x1b0b0
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>;
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};
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pinctrl_enet: enetgrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
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MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
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MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
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MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
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MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
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MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
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MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
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MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
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MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
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MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
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MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
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MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
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MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
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MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
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MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
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MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
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MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x1b0b0
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
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MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
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MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
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MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
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>;
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};
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pinctrl_uart4: uart4grp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
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MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
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MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
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MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
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>;
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};
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pinctrl_uart5: uart5grp {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x1b0b1
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MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x1b0b1
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>;
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};
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pinctrl_usdhc4: usdhc4grp {
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fsl,pins = <
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MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
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MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
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MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
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MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
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MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
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MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
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MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
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MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
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MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
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MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
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MX6QDL_PAD_NANDF_ALE__SD4_RESET 0x17059
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>;
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};
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};
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