33 lines
745 B
C
33 lines
745 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) Marvell International Ltd. and its affiliates
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*/
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#ifndef _MV_DDR4_TRAINING_H
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#define _MV_DDR4_TRAINING_H
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#include "ddr3_training_ip.h"
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/* configure DDR4 SDRAM */
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int mv_ddr4_sdram_config(u32 dev_num);
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/* configure phy */
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int mv_ddr4_phy_config(u32 dev_num);
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/*
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* configure sstl for manual calibration and pod for automatic one
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* assumes subphy configured to pod ealier
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*/
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int mv_ddr4_calibration_adjust(u32 dev_num, u8 vref_en, u8 pod_only);
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/*
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* validates calibration values
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* soc dependent; TODO: check it
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*/
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int mv_ddr4_calibration_validate(u32 dev_num);
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u16 mv_ddr4_rtt_nom_to_odt(u16 rtt_nom);
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u16 mv_ddr4_rtt_wr_to_odt(u16 rtt_wr);
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#endif /* _MV_DDR4_TRAINING_H */
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