90 lines
		
	
	
		
			2.7 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
			
		
		
	
	
			90 lines
		
	
	
		
			2.7 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
| /*
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|  * (C) Copyright 2000
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|  * Dave Ellis, SIXNET, dge@sixnetio.com
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|  *
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|  * See file CREDITS for list of people who contributed to this
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|  * project.
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License as
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|  * published by the Free Software Foundation; either version 2 of
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|  * the License, or (at your option) any later version.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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|  * MA 02111-1307 USA
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|  */
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| 
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| Using the Motorola MPC8XXFADS development board
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| ===============================================
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| 
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| CONFIGURATIONS
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| --------------
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| 
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| There are ready-to-use default configurations available for the
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| FADS823, FADS850SAR and FADS860T. The FADS860T configuration also
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| works for the 855T processor.
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| 
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| LOADING U-Boot INTO FADS FLASH MEMORY
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| --------------------------------------
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| 
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| MPC8BUG can load U-Boot into the FLASH memory using LOADF.
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| 
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|     loadf u-boot.srec 100000
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| 
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| 
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| STARTING U-Boot FROM MPC8BUG
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| -----------------------------
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| 
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| To start U-Boot from MPC8BUG:
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| 
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| 1. Reset the board:
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|     reset :h
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| 
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| 2. Change BR0 and OR0 back to their values at reset:
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|     rms memc br0 00000001
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|     rms memc or0 00000d34
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| 
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| 3. Modify DER so MPC8BUG gets control only when it should:
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|     rms der 2002000f
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| 
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| 4. Start as if from reset:
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|     go 100
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| 
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| This is NOT exactly the same as starting U-Boot without
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| MPC8BUG. MPC8BUG turns off the watchdog as part of the hard reset.
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| After it does the reset it writes SYPCR (to disable the watchdog)
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| and sets BR0 and OR0 to map the FLASH at 0x02800000 (and does lots
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| of other initialization). That is why it is necessary to set BR0
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| and OR0 to map the FLASH everywhere. U-Boot can't turn on the
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| watchdog after that, since MPC8BUG has used the only chance to write
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| to SYPCR.
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| 
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| Here is a bizarre sequence of MPC8BUG and U-Boot commands that lets
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| U-Boot write to SYPCR. It works with MPC8BUG 1.5 and an 855T
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| processor (your mileage may vary). It is probably better (and a lot
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| easier) just to accept having the watchdog disabled when the debug
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| cable is connected.
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| 
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| in MPC8BUG:
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|   reset :h
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|   rms memc br0 00000001
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|   rms memc or0 00000d34
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|   rms der 2000f
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|   go 100
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| 
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| Now U-Boot is running with the MPC8BUG value for SYPCR. Use the
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| U-Boot 'reset' command to reset the board.
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|   =>reset
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| Next, in MPC8BUG:
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|   rms der 2000f
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|   go
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| 
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| Now U-Boot is running with the U-Boot value for SYPCR.
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