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include/mach
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WS cleanup: remove SPACE(s) followed by TAB
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2021-09-30 09:08:16 -04:00 |
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Kconfig
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lib: Drop SHA512_ALGO in lieu of SHA512
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2021-09-08 16:11:46 -04:00 |
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Makefile
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arm: socfpga: Enable Intel N5X device build
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2021-08-25 15:26:38 +08:00 |
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board.c
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arm: socfpga: Move linux_qspi_enable from bootcommand to board_prep_linux function
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2021-08-24 14:29:50 +08:00 |
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clock_manager.c
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arm: socfpga: Changed to store QSPI reference clock in kHz
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2021-04-08 17:29:12 +08:00 |
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clock_manager_agilex.c
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arm: socfpga: Move Stratix10 and Agilex clock manager common code
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2021-04-08 17:29:12 +08:00 |
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clock_manager_arria10.c
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common: Drop linux/delay.h from common header
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2020-05-18 21:19:23 -04:00 |
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clock_manager_gen5.c
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arm: socfpga: Convert clock manager from struct to defines
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2020-01-07 14:38:33 +01:00 |
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clock_manager_n5x.c
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arm: socfpga: Add clock manager for Intel N5X device
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2021-08-25 13:32:50 +08:00 |
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clock_manager_s10.c
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arm: socfpga: Move Stratix10 and Agilex clock manager common code
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2021-04-08 17:29:12 +08:00 |
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firewall.c
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arm: socfpga: Move Stratix10 and Agilex system manager common code
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2020-01-07 14:38:33 +01:00 |
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fpga_manager.c
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…
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freeze_controller.c
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common: Drop linux/delay.h from common header
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2020-05-18 21:19:23 -04:00 |
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lowlevel_init_soc64.S
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arm: socfpga: soc64: Override 'lowlevel_init' to support ATF
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2021-01-15 17:48:35 +08:00 |
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mailbox_s10.c
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arm: socfpga: Changed to store QSPI reference clock in kHz
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2021-04-08 17:29:12 +08:00 |
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misc.c
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arm: socfpga: Get clock manager base address for Intel N5X device
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2021-08-25 12:54:37 +08:00 |
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misc_arria10.c
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common: Drop init.h from common header
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2020-05-18 17:33:33 -04:00 |
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misc_gen5.c
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common: Drop asm/global_data.h from common header
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2021-02-02 15:33:42 -05:00 |
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misc_soc64.c
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arm: socfpga: Changed misc_s10.c to misc_soc64.c
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2021-08-25 13:37:01 +08:00 |
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mmu-arm64_s10.c
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common: Drop asm/global_data.h from common header
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2021-02-02 15:33:42 -05:00 |
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pinmux_arria10.c
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common: Drop log.h from common header
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2020-05-18 21:19:18 -04:00 |
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qts-filter-a10.sh
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arm: socfpga: arria10: Add qts-filter for Arria10 socfpga
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2020-10-09 17:53:14 +08:00 |
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qts-filter.sh
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ddr: altera: Add DDR2 support to Gen5 driver
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2020-02-05 03:01:57 +01:00 |
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reset_manager_arria10.c
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common: Drop asm/global_data.h from common header
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2021-02-02 15:33:42 -05:00 |
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reset_manager_gen5.c
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common: Drop linux/bitops.h from common header
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2020-05-18 21:19:23 -04:00 |
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reset_manager_s10.c
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common: Drop asm/global_data.h from common header
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2021-02-02 15:33:42 -05:00 |
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scan_manager.c
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common: Drop linux/delay.h from common header
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2020-05-18 21:19:23 -04:00 |
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secure_reg_helper.c
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arm: socfpga: Add secure register access helper functions for SoC 64bits
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2021-01-15 17:48:36 +08:00 |
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secure_vab.c
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arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)
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2021-03-08 10:59:10 +08:00 |
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smc_api.c
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arm: socfpga: smc: Add function to get usercode
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2021-04-08 17:29:13 +08:00 |
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spl_a10.c
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mmc: Rename MMC_SUPPORT to MMC
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2021-09-04 11:42:41 -04:00 |
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spl_agilex.c
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arm: socfpga: Move Stratix10 and Agilex SPL common code
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2021-04-08 17:29:11 +08:00 |
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spl_gen5.c
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mmc: Rename MMC_SUPPORT to MMC
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2021-09-04 11:42:41 -04:00 |
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spl_n5x.c
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arm: socfpga: Add SPL for Intel N5X device
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2021-08-25 14:43:29 +08:00 |
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spl_s10.c
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arm: socfpga: Move Stratix10 and Agilex SPL common code
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2021-04-08 17:29:11 +08:00 |
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spl_soc64.c
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mmc: Rename MMC_SUPPORT to MMC
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2021-09-04 11:42:41 -04:00 |
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system_manager_gen5.c
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arm: socfpga: Convert system manager from struct to defines
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2020-01-07 14:38:33 +01:00 |
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system_manager_soc64.c
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arm: socfpga: Add handoff data support for Intel N5X device
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2021-08-24 17:13:35 +08:00 |
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timer.c
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common: Drop init.h from common header
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2020-05-18 17:33:33 -04:00 |
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timer_s10.c
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arm: socfpga: soc64: Initialize timer in SPL only
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2020-10-09 17:53:11 +08:00 |
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vab.c
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global: Convert simple_strtoul() with hex to hextoul()
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2021-08-02 13:32:14 -04:00 |
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wrap_handoff_soc64.c
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arm: socfpga: Add handoff data support for Intel N5X device
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2021-08-24 17:13:35 +08:00 |
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wrap_iocsr_config.c
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…
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wrap_pinmux_config.c
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…
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wrap_pll_config.c
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…
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wrap_pll_config_soc64.c
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arm: socfpga: Changed wrap_pll_config_s10.c to wrap_pll_config_soc64.c
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2021-04-08 17:29:12 +08:00 |
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wrap_sdram_config.c
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ddr: altera: Add DDR2 support to Gen5 driver
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2020-02-05 03:01:57 +01:00 |
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