146 lines
3.4 KiB
C
146 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
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*
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* Part of this file is ported from coreboot src/arch/x86/boot/pirq_routing.c
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*/
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#include <common.h>
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#include <log.h>
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#include <pci.h>
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#include <asm/global_data.h>
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#include <asm/pci.h>
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#include <asm/pirq_routing.h>
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DECLARE_GLOBAL_DATA_PTR;
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static u8 pirq_get_next_free_irq(struct udevice *dev, u8 *pirq, u16 bitmap,
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bool irq_already_routed[])
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{
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int i, link;
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u8 irq = 0;
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/* IRQ sharing starts from IRQ#3 */
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for (i = 3; i < 16; i++) {
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/* Can we assign this IRQ? */
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if (!((bitmap >> i) & 1))
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continue;
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/* We can, now let's assume we can use this IRQ */
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irq = i;
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/* Have we already routed it? */
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if (irq_already_routed[irq])
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continue;
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for (link = 0; link < CONFIG_MAX_PIRQ_LINKS; link++) {
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if (pirq_check_irq_routed(dev, link, irq)) {
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irq_already_routed[irq] = true;
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break;
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}
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}
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/* If it's not yet routed, use it */
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if (!irq_already_routed[irq]) {
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irq_already_routed[irq] = true;
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break;
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}
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/* But if it was already routed, try the next one */
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}
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/* Now we get our IRQ */
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return irq;
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}
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void pirq_route_irqs(struct udevice *dev, struct irq_info *irq, int num)
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{
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unsigned char irq_slot[MAX_INTX_ENTRIES];
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unsigned char pirq[CONFIG_MAX_PIRQ_LINKS];
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bool irq_already_routed[16];
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int i, intx;
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memset(pirq, 0, CONFIG_MAX_PIRQ_LINKS);
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memset(irq_already_routed, '\0', sizeof(irq_already_routed));
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/* Set PCI IRQs */
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for (i = 0; i < num; i++) {
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debug("PIRQ Entry %d Dev: %d.%x.%d\n", i,
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irq->bus, irq->devfn >> 3, irq->devfn & 7);
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for (intx = 0; intx < MAX_INTX_ENTRIES; intx++) {
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int link = irq->irq[intx].link;
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int bitmap = irq->irq[intx].bitmap;
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int irq = 0;
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debug("INT%c link: %x bitmap: %x ",
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'A' + intx, link, bitmap);
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if (!bitmap || !link) {
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debug("not routed\n");
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irq_slot[intx] = irq;
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continue;
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}
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/* translate link value to link number */
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link = pirq_translate_link(dev, link);
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/* yet not routed */
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if (!pirq[link]) {
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irq = pirq_get_next_free_irq(dev, pirq, bitmap,
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irq_already_routed);
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pirq[link] = irq;
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} else {
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irq = pirq[link];
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}
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debug("IRQ: %d\n", irq);
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irq_slot[intx] = irq;
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/* Assign IRQ in the interrupt router */
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pirq_assign_irq(dev, link, irq);
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}
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/* Bus, device, slots IRQs for {A,B,C,D} */
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pci_assign_irqs(irq->bus, irq->devfn >> 3, irq_slot);
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irq++;
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}
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for (i = 0; i < CONFIG_MAX_PIRQ_LINKS; i++)
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debug("PIRQ%c: %d\n", 'A' + i, pirq[i]);
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}
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u32 copy_pirq_routing_table(u32 addr, struct irq_routing_table *rt)
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{
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struct irq_routing_table *rom_rt;
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/* Align the table to be 16 byte aligned */
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addr = ALIGN(addr, 16);
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debug("Copying Interrupt Routing Table to 0x%x\n", addr);
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memcpy((void *)(uintptr_t)addr, rt, rt->size);
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/*
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* We do the sanity check here against the copied table after memcpy,
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* as something might go wrong after the memcpy, which is normally
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* due to the F segment decode is not turned on to systeam RAM.
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*/
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rom_rt = (struct irq_routing_table *)(uintptr_t)addr;
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if (rom_rt->signature != PIRQ_SIGNATURE ||
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rom_rt->version != PIRQ_VERSION || rom_rt->size % 16) {
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printf("Interrupt Routing Table not valid\n");
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return addr;
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}
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return addr + rt->size;
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}
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ulong write_pirq_routing_table(ulong addr)
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{
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if (!gd->arch.pirq_routing_table)
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return addr;
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return copy_pirq_routing_table(addr, gd->arch.pirq_routing_table);
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}
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