433 lines
9.9 KiB
Plaintext
433 lines
9.9 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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//
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// Copyright 2021 Ronetix GmbH
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/dts-v1/;
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#include "imx7d.dtsi"
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/ {
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model = "Ronetix iMX7-CM Board";
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compatible = "ronetix,imx7-cm", "fsl,imx7d";
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chosen {
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stdout-path = &uart1;
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};
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/* DRAM size runtime extracted from the DDRC registers */
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0>;
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_leds>;
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led {
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label = "gpio-led";
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gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
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};
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};
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reg_sd1_vmmc: regulator-sd1-vmmc {
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compatible = "regulator-fixed";
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regulator-name = "VDD_SD1";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <200000>;
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off-on-delay-us = <20000>;
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enable-active-high;
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};
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reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg1_pwr>;
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compatible = "regulator-fixed";
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regulator-name = "usb_otg1_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg2_pwr>;
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compatible = "regulator-fixed";
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regulator-name = "usb_otg2_vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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};
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&clks {
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assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
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<&clks IMX7D_CLKO2_ROOT_DIV>;
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assigned-clock-parents = <&clks IMX7D_CKIL>;
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assigned-clock-rates = <0>, <32768>;
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};
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&fec1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet1>;
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phy-mode = "rgmii-id";
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phy-handle = <ðphy0>;
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fsl,magic-packet;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy0: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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reset-gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
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reset-assert-us = <10000>;
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};
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};
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};
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&qspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_qspi1_1>;
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status = "okay";
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ddrsmp=<0>;
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flash0: mx25l25645g@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-max-frequency = <29000000>;
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reg = <0>;
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};
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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pmic@8 {
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compatible = "fsl,pfuze3000";
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reg = <0x08>;
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regulators {
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sw1a_reg: sw1a {
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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/* use sw1c_reg to align with pfuze100/pfuze200 */
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sw1c_reg: sw1b {
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regulator-min-microvolt = <700000>;
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regulator-max-microvolt = <1475000>;
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regulator-boot-on;
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regulator-always-on;
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regulator-ramp-delay = <6250>;
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};
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sw2_reg: sw2 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1850000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sw3a_reg: sw3 {
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <1650000>;
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regulator-boot-on;
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regulator-always-on;
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};
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swbst_reg: swbst {
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5150000>;
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};
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snvs_reg: vsnvs {
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <3000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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vref_reg: vrefddr {
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regulator-boot-on;
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regulator-always-on;
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};
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vgen1_reg: vldo1 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen2_reg: vldo2 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1550000>;
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};
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vgen3_reg: vccsd {
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regulator-min-microvolt = <2850000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen4_reg: v33 {
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regulator-min-microvolt = <2850000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen5_reg: vldo3 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vgen6_reg: vldo4 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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};
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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};
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&uart1 { /* console */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&usbotg1 {
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vbus-supply = <®_usb_otg1_vbus>;
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status = "okay";
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};
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&usbotg2 {
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vbus-supply = <®_usb_otg2_vbus>;
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dr_mode = "host";
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status = "okay";
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};
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/* SD card */
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&usdhc1 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
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pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>;
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pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>;
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cd-gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>;
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bus-width = <4>;
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tuning-step = <2>;
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vmmc-supply = <®_sd1_vmmc>;
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wakeup-source;
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no-1-8-v;
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keep-power-in-suspend;
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status = "okay";
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};
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/* eMMC */
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&usdhc3 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc3>;
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pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
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assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
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assigned-clock-rates = <400000000>;
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bus-width = <8>;
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no-1-8-v;
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fsl,tuning-step = <2>;
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non-removable;
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status = "okay";
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};
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&wdog1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wdog>;
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fsl,ext-reset-output;
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status = "okay";
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};
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&iomuxc {
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f
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MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f
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MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f
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>;
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};
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pinctrl_enet1: enet1grp {
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fsl,pins = <
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MX7D_PAD_GPIO1_IO10__ENET1_MDIO 0x3
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MX7D_PAD_GPIO1_IO11__ENET1_MDC 0x3
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MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x1
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MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x1
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MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x1
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MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x1
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MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x1
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MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x1
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MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x1
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MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x1
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MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x1
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MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x1
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MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x1
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MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1
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MX7D_PAD_EPDC_DATA04__GPIO2_IO4 0x14 /* ETH_RESET */
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>;
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};
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pinctrl_gpio_leds: gpioledsgrp {
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fsl,pins = <
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MX7D_PAD_EPDC_DATA07__GPIO2_IO7 0x14
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x59
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MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x59
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>;
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};
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pinctrl_usbotg1_pwr: usbotg_pwr {
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fsl,pins = <
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MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x14
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>;
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};
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pinctrl_usbotg2_pwr: usbotg_pwr {
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fsl,pins = <
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MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14
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>;
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};
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pinctrl_usdhc1_gpio: usdhc1_gpiogrp {
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fsl,pins = <
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MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x15 /* CD */
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MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x59 /* Vmmc */
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MX7D_PAD_GPIO1_IO08__SD1_VSELECT 0x59 /* VSELECT */
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>;
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};
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pinctrl_usdhc1: usdhc1grp {
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fsl,pins = <
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MX7D_PAD_SD1_CMD__SD1_CMD 0x59
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MX7D_PAD_SD1_CLK__SD1_CLK 0x19
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MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59
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MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59
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MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59
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MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59
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>;
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};
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pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
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fsl,pins = <
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MX7D_PAD_SD1_CMD__SD1_CMD 0x5a
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MX7D_PAD_SD1_CLK__SD1_CLK 0x1a
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MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a
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MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a
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MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a
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MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a
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>;
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};
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pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
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fsl,pins = <
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MX7D_PAD_SD1_CMD__SD1_CMD 0x5b
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MX7D_PAD_SD1_CLK__SD1_CLK 0x1b
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MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b
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MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b
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MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b
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MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX7D_PAD_SD3_CMD__SD3_CMD 0x59
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MX7D_PAD_SD3_CLK__SD3_CLK 0x19
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MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
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MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
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MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
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MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
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MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
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MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
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MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
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MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
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>;
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};
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pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
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fsl,pins = <
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MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
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MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
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MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
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MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
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MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
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MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a
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MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a
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MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a
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MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a
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MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a
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>;
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};
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pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
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fsl,pins = <
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MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
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MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
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MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
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MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
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MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
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MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b
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MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b
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MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b
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MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b
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MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
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>;
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};
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pinctrl_qspi1_1: qspi1grp_1 {
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fsl,pins = <
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MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0 0x51
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MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1 0x51
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MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2 0x51
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MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3 0x51
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MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK 0x51
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MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B 0x51
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>;
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};
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};
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&iomuxc_lpsr {
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pinctrl_wdog: wdoggrp {
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fsl,pins = <
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MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x74
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>;
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};
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};
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