181 lines
		
	
	
		
			3.9 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			181 lines
		
	
	
		
			3.9 KiB
		
	
	
	
		
			C
		
	
	
	
| /*
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|  * (C) Copyright 2015
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|  * Kamil Lulko, <kamil.lulko@gmail.com>
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|  *
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|  * Copyright 2015 ATS Advanced Telematics Systems GmbH
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|  * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| 
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| #include <common.h>
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| #include <asm/io.h>
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| #include <asm/arch/stm32.h>
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| 
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| #define STM32_FLASH_KEY1	0x45670123
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| #define STM32_FLASH_KEY2	0xcdef89ab
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| 
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| #define STM32_NUM_BANKS	2
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| #define STM32_MAX_BANK	0x200
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| 
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| flash_info_t flash_info[STM32_NUM_BANKS];
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| static struct stm32_flash_bank_regs *flash_bank[STM32_NUM_BANKS];
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| 
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| static void stm32f1_flash_lock(u8 bank, u8 lock)
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| {
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| 	if (lock) {
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| 		setbits_le32(&flash_bank[bank]->cr, STM32_FLASH_CR_LOCK);
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| 	} else {
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| 		writel(STM32_FLASH_KEY1, &flash_bank[bank]->keyr);
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| 		writel(STM32_FLASH_KEY2, &flash_bank[bank]->keyr);
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| 	}
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| }
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| 
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| /* Only XL devices are supported (2 KiB sector size) */
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| unsigned long flash_init(void)
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| {
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| 	u8 i, banks;
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| 	u16 j, size;
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| 
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| 	/* Set up accessors for XL devices with wonky register layout */
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| 	flash_bank[0] = (struct stm32_flash_bank_regs *)&STM32_FLASH->keyr;
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| 	flash_bank[1] = (struct stm32_flash_bank_regs *)&STM32_FLASH->keyr2;
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| 
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| 	/*
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| 	 * Get total flash size (in KiB) and configure number of banks
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| 	 * present and sector count per bank.
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| 	 */
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| 	size = readw(&STM32_DES->flash_size);
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| 	if (size <= STM32_MAX_BANK) {
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| 		banks = 1;
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| 		flash_info[0].sector_count = size >> 1;
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| 	} else if (size > STM32_MAX_BANK) {
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| 		banks = 2;
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| 		flash_info[0].sector_count = STM32_MAX_BANK >> 1;
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| 		flash_info[1].sector_count = (size - STM32_MAX_BANK) >> 1;
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| 	}
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| 
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| 	/* Configure start/size for all sectors */
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| 	for (i = 0; i < banks; i++) {
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| 		flash_info[i].flash_id = FLASH_STM32F1;
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| 		flash_info[i].start[0] = CONFIG_SYS_FLASH_BASE + (i << 19);
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| 		flash_info[i].size = 2048;
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| 		for (j = 1; (j < flash_info[i].sector_count); j++) {
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| 			flash_info[i].start[j] = flash_info[i].start[j - 1]
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| 				+ 2048;
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| 			flash_info[i].size += 2048;
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| 		}
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| 	}
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| 
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| 	return size << 10;
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| }
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| 
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| void flash_print_info(flash_info_t *info)
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| {
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| 	int i;
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| 
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| 	if (info->flash_id == FLASH_UNKNOWN) {
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| 		printf("Missing or unknown FLASH type\n");
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| 		return;
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| 	} else if (info->flash_id == FLASH_STM32F1) {
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| 		printf("STM32F1 Embedded Flash\n");
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| 	}
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| 
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| 	printf("  Size: %ld MB in %d Sectors\n",
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| 	       info->size >> 10, info->sector_count);
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| 
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| 	printf("  Sector Start Addresses:");
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| 	for (i = 0; i < info->sector_count; ++i) {
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| 		if ((i % 5) == 0)
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| 			printf("\n   ");
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| 		printf(" %08lX%s",
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| 		       info->start[i],
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| 			info->protect[i] ? " (RO)" : "     ");
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| 	}
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| 	printf("\n");
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| 	return;
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| }
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| 
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| int flash_erase(flash_info_t *info, int first, int last)
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| {
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| 	u8 bank = 0xff;
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| 	int i;
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| 
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| 	for (i = 0; i < STM32_NUM_BANKS; i++) {
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| 		if (info == &flash_info[i]) {
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| 			bank = i;
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| 			break;
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| 		}
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| 	}
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| 	if (bank == 0xff)
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| 		return -1;
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| 
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| 	stm32f1_flash_lock(bank, 0);
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| 
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| 	for (i = first; i <= last; i++) {
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| 		while (readl(&flash_bank[bank]->sr) & STM32_FLASH_SR_BSY)
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| 			;
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| 
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| 		setbits_le32(&flash_bank[bank]->cr, STM32_FLASH_CR_PER);
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| 
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| 		writel(info->start[i], &flash_bank[bank]->ar);
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| 
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| 		setbits_le32(&flash_bank[bank]->cr, STM32_FLASH_CR_STRT);
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| 
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| 		while (readl(&flash_bank[bank]->sr) & STM32_FLASH_SR_BSY)
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| 			;
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| 	}
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| 
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| 	clrbits_le32(&flash_bank[bank]->cr, STM32_FLASH_CR_PER);
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| 
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| 	stm32f1_flash_lock(bank, 1);
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| 
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| 	return 0;
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| }
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| 
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| int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
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| {
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| 	ulong i;
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| 	u8 bank = 0xff;
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| 
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| 	if (addr & 1) {
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| 		printf("Flash address must be half word aligned\n");
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| 		return -1;
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| 	}
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| 
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| 	if (cnt & 1) {
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| 		printf("Flash length must be half word aligned\n");
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| 		return -1;
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| 	}
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| 
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| 	for (i = 0; i < 2; i++) {
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| 		if (info == &flash_info[i]) {
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| 			bank = i;
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| 			break;
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| 		}
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| 	}
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| 
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| 	if (bank == 0xff)
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| 		return -1;
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| 
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| 	while (readl(&flash_bank[bank]->sr) & STM32_FLASH_SR_BSY)
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| 		;
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| 
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| 	stm32f1_flash_lock(bank, 0);
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| 
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| 	setbits_le32(&flash_bank[bank]->cr, STM32_FLASH_CR_PG);
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| 
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| 	/* STM32F1 requires half word writes */
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| 	for (i = 0; i < cnt >> 1; i++) {
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| 		*(u16 *)(addr + i * 2) = ((u16 *)src)[i];
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| 		while (readl(&flash_bank[bank]->sr) & STM32_FLASH_SR_BSY)
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| 			;
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| 	}
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| 
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| 	clrbits_le32(&flash_bank[bank]->cr, STM32_FLASH_CR_PG);
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| 
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| 	stm32f1_flash_lock(bank, 1);
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| 
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| 	return 0;
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| }
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