108 lines
2.3 KiB
Plaintext
108 lines
2.3 KiB
Plaintext
/*
|
|
* Copyright 2016 Freescale Semiconductor
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
/include/ "skeleton64.dtsi"
|
|
|
|
/ {
|
|
compatible = "fsl,ls1012a";
|
|
interrupt-parent = <&gic>;
|
|
|
|
sysclk: sysclk {
|
|
compatible = "fixed-clock";
|
|
#clock-cells = <0>;
|
|
clock-frequency = <100000000>;
|
|
clock-output-names = "sysclk";
|
|
};
|
|
|
|
gic: interrupt-controller@1400000 {
|
|
compatible = "arm,gic-400";
|
|
#interrupt-cells = <3>;
|
|
interrupt-controller;
|
|
reg = <0x0 0x1401000 0 0x1000>, /* GICD */
|
|
<0x0 0x1402000 0 0x2000>, /* GICC */
|
|
<0x0 0x1404000 0 0x2000>, /* GICH */
|
|
<0x0 0x1406000 0 0x2000>; /* GICV */
|
|
interrupts = <1 9 0xf08>;
|
|
};
|
|
|
|
soc {
|
|
compatible = "simple-bus";
|
|
#address-cells = <2>;
|
|
#size-cells = <2>;
|
|
ranges;
|
|
|
|
clockgen: clocking@1ee1000 {
|
|
compatible = "fsl,ls1012a-clockgen";
|
|
reg = <0x0 0x1ee1000 0x0 0x1000>;
|
|
#clock-cells = <2>;
|
|
clocks = <&sysclk>;
|
|
};
|
|
|
|
dspi0: dspi@2100000 {
|
|
compatible = "fsl,vf610-dspi";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x0 0x2100000 0x0 0x10000>;
|
|
interrupts = <0 64 0x4>;
|
|
clock-names = "dspi";
|
|
clocks = <&clockgen 4 0>;
|
|
num-cs = <6>;
|
|
big-endian;
|
|
status = "disabled";
|
|
};
|
|
|
|
|
|
i2c0: i2c@2180000 {
|
|
compatible = "fsl,vf610-i2c";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x0 0x2180000 0x0 0x10000>;
|
|
interrupts = <0 56 0x4>;
|
|
clock-names = "i2c";
|
|
clocks = <&clockgen 4 0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c1: i2c@2190000 {
|
|
compatible = "fsl,vf610-i2c";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x0 0x2190000 0x0 0x10000>;
|
|
interrupts = <0 57 0x4>;
|
|
clock-names = "i2c";
|
|
clocks = <&clockgen 4 0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
duart0: serial@21c0500 {
|
|
compatible = "fsl,ns16550", "ns16550a";
|
|
reg = <0x00 0x21c0500 0x0 0x100>;
|
|
interrupts = <0 54 0x4>;
|
|
clocks = <&clockgen 4 0>;
|
|
};
|
|
|
|
duart1: serial@21c0600 {
|
|
compatible = "fsl,ns16550", "ns16550a";
|
|
reg = <0x00 0x21c0600 0x0 0x100>;
|
|
interrupts = <0 54 0x4>;
|
|
clocks = <&clockgen 4 0>;
|
|
};
|
|
|
|
qspi: quadspi@1550000 {
|
|
compatible = "fsl,vf610-qspi";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <0x0 0x1550000 0x0 0x10000>,
|
|
<0x0 0x40000000 0x0 0x4000000>;
|
|
reg-names = "QuadSPI", "QuadSPI-memory";
|
|
num-cs = <2>;
|
|
big-endian;
|
|
status = "disabled";
|
|
};
|
|
|
|
};
|
|
};
|