267 lines
		
	
	
		
			7.1 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
			
		
		
	
	
			267 lines
		
	
	
		
			7.1 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
| /*
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|  * Copyright 2013 Maxime Ripard
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|  *
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|  * Maxime Ripard <maxime.ripard@free-electrons.com>
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|  *
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|  * This file is dual-licensed: you can use it either under the terms
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|  * of the GPL or the X11 license, at your option. Note that this dual
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|  * licensing only applies to this file, and not this project as a
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|  * whole.
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|  *
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|  *  a) This library is free software; you can redistribute it and/or
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|  *     modify it under the terms of the GNU General Public License as
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|  *     published by the Free Software Foundation; either version 2 of the
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|  *     License, or (at your option) any later version.
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|  *
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|  *     This library is distributed in the hope that it will be useful,
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|  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  *     GNU General Public License for more details.
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|  *
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|  * Or, alternatively,
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|  *
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|  *  b) Permission is hereby granted, free of charge, to any person
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|  *     obtaining a copy of this software and associated documentation
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|  *     files (the "Software"), to deal in the Software without
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|  *     restriction, including without limitation the rights to use,
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|  *     copy, modify, merge, publish, distribute, sublicense, and/or
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|  *     sell copies of the Software, and to permit persons to whom the
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|  *     Software is furnished to do so, subject to the following
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|  *     conditions:
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|  *
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|  *     The above copyright notice and this permission notice shall be
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|  *     included in all copies or substantial portions of the Software.
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|  *
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|  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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|  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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|  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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|  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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|  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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|  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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|  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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|  *     OTHER DEALINGS IN THE SOFTWARE.
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|  */
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| 
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| #include "skeleton.dtsi"
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| 
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| #include "sun5i.dtsi"
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| 
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| #include <dt-bindings/dma/sun4i-a10.h>
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| #include <dt-bindings/pinctrl/sun4i-a10.h>
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| 
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| / {
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| 	interrupt-parent = <&intc>;
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| 
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| 	aliases {
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| 		ethernet0 = &emac;
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| 	};
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| 
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| 	chosen {
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| 		#address-cells = <1>;
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| 		#size-cells = <1>;
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| 		ranges;
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| 
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| 		framebuffer@0 {
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| 			compatible = "allwinner,simple-framebuffer",
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| 				     "simple-framebuffer";
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| 			allwinner,pipeline = "de_be0-lcd0-hdmi";
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| 			clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
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| 				 <&ahb_gates 44>;
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| 			status = "disabled";
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| 		};
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| 
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| 		framebuffer@1 {
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| 			compatible = "allwinner,simple-framebuffer",
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| 				     "simple-framebuffer";
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| 			allwinner,pipeline = "de_be0-lcd0";
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| 			clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>;
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| 			status = "disabled";
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| 		};
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| 
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| 		framebuffer@2 {
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| 			compatible = "allwinner,simple-framebuffer",
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| 				     "simple-framebuffer";
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| 			allwinner,pipeline = "de_be0-lcd0-tve0";
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| 			clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>,
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| 				 <&ahb_gates 44>;
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| 			status = "disabled";
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| 		};
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| 	};
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| 
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| 	clocks {
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| 		ahb_gates: clk@01c20060 {
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| 			#clock-cells = <1>;
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| 			compatible = "allwinner,sun5i-a10s-ahb-gates-clk";
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| 			reg = <0x01c20060 0x8>;
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| 			clocks = <&ahb>;
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| 			clock-indices = <0>, <1>,
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| 					<2>, <5>, <6>,
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| 					<7>, <8>, <9>,
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| 					<10>, <13>,
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| 					<14>, <17>, <18>,
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| 					<20>, <21>, <22>,
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| 					<26>, <28>, <32>,
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| 					<34>, <36>, <40>,
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| 					<43>, <44>,
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| 					<46>, <51>,
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| 					<52>;
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| 			clock-output-names = "ahb_usbotg", "ahb_ehci",
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| 					     "ahb_ohci", "ahb_ss", "ahb_dma",
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| 					     "ahb_bist", "ahb_mmc0", "ahb_mmc1",
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| 					     "ahb_mmc2", "ahb_nand",
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| 					     "ahb_sdram", "ahb_emac", "ahb_ts",
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| 					     "ahb_spi0", "ahb_spi1", "ahb_spi2",
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| 					     "ahb_gps", "ahb_stimer", "ahb_ve",
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| 					     "ahb_tve", "ahb_lcd", "ahb_csi",
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| 					     "ahb_hdmi", "ahb_de_be",
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| 					     "ahb_de_fe", "ahb_iep",
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| 					     "ahb_mali400";
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| 		};
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| 
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| 		apb0_gates: clk@01c20068 {
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| 			#clock-cells = <1>;
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| 			compatible = "allwinner,sun5i-a10s-apb0-gates-clk";
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| 			reg = <0x01c20068 0x4>;
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| 			clocks = <&apb0>;
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| 			clock-indices = <0>, <3>,
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| 					<5>, <6>,
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| 					<10>;
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| 			clock-output-names = "apb0_codec", "apb0_iis",
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| 					     "apb0_pio", "apb0_ir",
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| 					     "apb0_keypad";
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| 		};
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| 
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| 		apb1_gates: clk@01c2006c {
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| 			#clock-cells = <1>;
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| 			compatible = "allwinner,sun5i-a10s-apb1-gates-clk";
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| 			reg = <0x01c2006c 0x4>;
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| 			clocks = <&apb1>;
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| 			clock-indices = <0>, <1>,
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| 					<2>, <16>,
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| 					<17>, <18>,
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| 					<19>;
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| 			clock-output-names = "apb1_i2c0", "apb1_i2c1",
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| 					     "apb1_i2c2", "apb1_uart0",
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| 					     "apb1_uart1", "apb1_uart2",
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| 					     "apb1_uart3";
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| 		};
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| 	};
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| 
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| 	soc@01c00000 {
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| 		emac: ethernet@01c0b000 {
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| 			compatible = "allwinner,sun4i-a10-emac";
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| 			reg = <0x01c0b000 0x1000>;
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| 			interrupts = <55>;
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| 			clocks = <&ahb_gates 17>;
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| 			allwinner,sram = <&emac_sram 1>;
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| 			status = "disabled";
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| 		};
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| 
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| 		mdio: mdio@01c0b080 {
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| 			compatible = "allwinner,sun4i-a10-mdio";
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| 			reg = <0x01c0b080 0x14>;
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| 			status = "disabled";
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| 			#address-cells = <1>;
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| 			#size-cells = <0>;
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| 		};
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| 
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| 		pwm: pwm@01c20e00 {
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| 			compatible = "allwinner,sun5i-a10s-pwm";
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| 			reg = <0x01c20e00 0xc>;
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| 			clocks = <&osc24M>;
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| 			#pwm-cells = <3>;
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| 			status = "disabled";
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| 		};
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| 
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| 		uart0: serial@01c28000 {
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| 			compatible = "snps,dw-apb-uart";
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| 			reg = <0x01c28000 0x400>;
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| 			interrupts = <1>;
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| 			reg-shift = <2>;
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| 			reg-io-width = <4>;
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| 			clocks = <&apb1_gates 16>;
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| 			status = "disabled";
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| 		};
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| 
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| 		uart2: serial@01c28800 {
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| 			compatible = "snps,dw-apb-uart";
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| 			reg = <0x01c28800 0x400>;
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| 			interrupts = <3>;
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| 			reg-shift = <2>;
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| 			reg-io-width = <4>;
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| 			clocks = <&apb1_gates 18>;
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| 			status = "disabled";
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| 		};
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| 	};
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| };
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| 
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| &pio {
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| 	compatible = "allwinner,sun5i-a10s-pinctrl";
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| 
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| 	uart0_pins_a: uart0@0 {
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| 		allwinner,pins = "PB19", "PB20";
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| 		allwinner,function = "uart0";
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| 		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
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| 		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
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| 	};
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| 
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| 	uart2_pins_a: uart2@0 {
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| 		allwinner,pins = "PC18", "PC19";
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| 		allwinner,function = "uart2";
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| 		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
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| 		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
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| 	};
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| 
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| 	emac_pins_a: emac0@0 {
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| 		allwinner,pins = "PA0", "PA1", "PA2",
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| 				"PA3", "PA4", "PA5", "PA6",
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| 				"PA7", "PA8", "PA9", "PA10",
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| 				"PA11", "PA12", "PA13", "PA14",
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| 				"PA15", "PA16";
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| 		allwinner,function = "emac";
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| 		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
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| 		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
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| 	};
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| 
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| 	emac_pins_b: emac0@1 {
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| 		allwinner,pins = "PD6", "PD7", "PD10",
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| 				"PD11", "PD12", "PD13", "PD14",
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| 				"PD15", "PD18", "PD19", "PD20",
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| 				"PD21", "PD22", "PD23", "PD24",
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| 				"PD25", "PD26", "PD27";
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| 		allwinner,function = "emac";
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| 		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
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| 		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
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| 	};
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| 
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| 	mmc1_pins_a: mmc1@0 {
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| 		allwinner,pins = "PG3", "PG4", "PG5",
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| 				 "PG6", "PG7", "PG8";
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| 		allwinner,function = "mmc1";
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| 		allwinner,drive = <SUN4I_PINCTRL_30_MA>;
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| 		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
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| 	};
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| 
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| 	nand_cs2_pins_a: nand_cs@2 {
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| 		allwinner,pins = "PC17";
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| 		allwinner,function = "nand0";
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| 		allwinner,drive = <0>;
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| 		allwinner,pull = <0>;
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| 	};
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| 
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| 	nand_cs3_pins_a: nand_cs@3 {
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| 		allwinner,pins = "PC18";
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| 		allwinner,function = "nand0";
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| 		allwinner,drive = <0>;
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| 		allwinner,pull = <0>;
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| 	};
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| };
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| 
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| &sram_a {
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| 	emac_sram: sram-section@8000 {
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| 		compatible = "allwinner,sun4i-a10-sram-a3-a4";
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| 		reg = <0x8000 0x4000>;
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| 		status = "disabled";
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| 	};
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| };
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