70 lines
1.8 KiB
C
70 lines
1.8 KiB
C
/*
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* (C) Copyright 2007
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* Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#if defined(CONFIG_CMD_NAND)
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#include <asm/io.h>
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#include <nand.h>
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/*
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* hardware specific access to control-lines
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*/
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static void esd405ep_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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{
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struct nand_chip *this = mtd_to_nand(mtd);
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if (ctrl & NAND_CTRL_CHANGE) {
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if ( ctrl & NAND_CLE )
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out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CONFIG_SYS_NAND_CLE);
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else
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out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_NAND_CLE);
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if ( ctrl & NAND_ALE )
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out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CONFIG_SYS_NAND_ALE);
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else
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out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_NAND_ALE);
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if ( ctrl & NAND_NCE )
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out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_NAND_CE);
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else
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out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CONFIG_SYS_NAND_CE);
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}
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if (cmd != NAND_CMD_NONE)
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writeb(cmd, this->IO_ADDR_W);
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}
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/*
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* read device ready pin
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*/
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static int esd405ep_nand_device_ready(struct mtd_info *mtdinfo)
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{
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if (in_be32((void *)GPIO0_IR) & CONFIG_SYS_NAND_RDY)
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return 1;
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return 0;
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}
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int board_nand_init(struct nand_chip *nand)
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{
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/*
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* Set NAND-FLASH GPIO signals to defaults
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*/
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out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~(CONFIG_SYS_NAND_CLE | CONFIG_SYS_NAND_ALE));
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out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CONFIG_SYS_NAND_CE);
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/*
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* Initialize nand_chip structure
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*/
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nand->cmd_ctrl = esd405ep_nand_hwcontrol;
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nand->dev_ready = esd405ep_nand_device_ready;
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nand->ecc.mode = NAND_ECC_SOFT;
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nand->chip_delay = NAND_BIG_DELAY_US;
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nand->options = NAND_SAMSUNG_LP_OPTIONS;
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return 0;
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}
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#endif
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