121 lines
2.6 KiB
C
121 lines
2.6 KiB
C
/*
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* board/renesas/salvator-x/salvator-x.c
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* This file is Salvator-X board support.
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*
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* Copyright (C) 2015 Renesas Electronics Corporation
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* Copyright (C) 2015 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <malloc.h>
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#include <netdev.h>
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#include <dm.h>
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#include <dm/platform_data/serial_sh.h>
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#include <asm/processor.h>
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#include <asm/mach-types.h>
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#include <asm/io.h>
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#include <asm/errno.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/gpio.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/rmobile.h>
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#include <asm/arch/rcar-mstp.h>
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#include <i2c.h>
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#include <mmc.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define CPGWPCR 0xE6150904
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#define CPGWPR 0xE615090C
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#define CLK2MHZ(clk) (clk / 1000 / 1000)
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void s_init(void)
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{
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struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE;
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struct rcar_swdt *swdt = (struct rcar_swdt *)SWDT_BASE;
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/* Watchdog init */
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writel(0xA5A5A500, &rwdt->rwtcsra);
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writel(0xA5A5A500, &swdt->swtcsra);
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writel(0xA5A50000, CPGWPCR);
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writel(0xFFFFFFFF, CPGWPR);
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}
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#define GSX_MSTP112 (1 << 12) /* 3DG */
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#define TMU0_MSTP125 (1 << 25) /* secure */
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#define TMU1_MSTP124 (1 << 24) /* non-secure */
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#define SCIF2_MSTP310 (1 << 10) /* SCIF2 */
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int board_early_init_f(void)
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{
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/* TMU0,1 */ /* which use ? */
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mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125 | TMU1_MSTP124);
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/* SCIF2 */
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mstp_clrbits_le32(MSTPSR3, SMSTPCR3, SCIF2_MSTP310);
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return 0;
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}
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/* SYSC */
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/* R/- 32 Power status register 2(3DG) */
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#define SYSC_PWRSR2 0xE6180100
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/* -/W 32 Power resume control register 2 (3DG) */
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#define SYSC_PWRONCR2 0xE618010C
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DECLARE_GLOBAL_DATA_PTR;
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int board_init(void)
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{
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/* adress of boot parameters */
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gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;
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/* Init PFC controller */
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r8a7795_pinmux_init();
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/* GSX: force power and clock supply */
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writel(0x0000001F, SYSC_PWRONCR2);
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while (readl(SYSC_PWRSR2) != 0x000003E0)
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mdelay(20);
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mstp_clrbits_le32(MSTPSR1, SMSTPCR1, GSX_MSTP112);
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return 0;
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}
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int dram_init(void)
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{
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gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
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return 0;
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}
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const struct rmobile_sysinfo sysinfo = {
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CONFIG_RCAR_BOARD_STRING
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};
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#define RST_BASE 0xE6160000
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#define RST_CA57RESCNT (RST_BASE + 0x40)
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#define RST_CA53RESCNT (RST_BASE + 0x44)
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#define RST_RSTOUTCR (RST_BASE + 0x58)
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#define RST_CODE 0xA5A5000F
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void reset_cpu(ulong addr)
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{
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/* only CA57 ? */
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writel(RST_CODE, RST_CA57RESCNT);
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}
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static const struct sh_serial_platdata serial_platdata = {
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.base = SCIF2_BASE,
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.type = PORT_SCIF,
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.clk = 14745600, /* 0xE10000 */
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.clk_mode = EXT_CLK,
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};
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U_BOOT_DEVICE(salvator_x_scif2) = {
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.name = "serial_sh",
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.platdata = &serial_platdata,
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};
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