139 lines
		
	
	
		
			4.5 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			139 lines
		
	
	
		
			4.5 KiB
		
	
	
	
		
			C
		
	
	
	
| /*
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|  * Copyright (C) 2013 Freescale Semiconductor, Inc.
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|  * Copyright (C) 2015 ECA Sinters
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|  *
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|  * Author: Fabio Estevam <fabio.estevam@freescale.com>
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|  * Modified by: Boris Brezillon <boris.brezillon@free-electrons.com>
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| 
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| #include <asm/arch/clock.h>
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| #include <asm/arch/imx-regs.h>
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| #include <asm/arch/iomux.h>
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| #include <asm/arch/mx6-pins.h>
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| #include <asm/errno.h>
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| #include <asm/gpio.h>
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| #include <asm/imx-common/iomux-v3.h>
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| #include <asm/imx-common/boot_mode.h>
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| #include <mmc.h>
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| #include <fsl_esdhc.h>
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| #include <miiphy.h>
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| #include <netdev.h>
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| #include <asm/arch/mxc_hdmi.h>
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| #include <asm/arch/crm_regs.h>
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| #include <linux/fb.h>
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| #include <ipu_pixfmt.h>
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| #include <asm/io.h>
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| #include <asm/arch/sys_proto.h>
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| #include <micrel.h>
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| #include <asm/imx-common/mxc_i2c.h>
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| #include <i2c.h>
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| 
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| #define UART_PAD_CTRL  (PAD_CTL_PUS_100K_UP |			\
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| 	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm |			\
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| 	PAD_CTL_SRE_FAST  | PAD_CTL_HYS)
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| 
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| static iomux_v3_cfg_t const uart2_pads[] = {
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| 	MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
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| 	MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
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| };
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| 
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| void seco_mx6_setup_uart_iomux(void)
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| {
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| 	imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads));
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| }
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| 
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| #define ENET_PAD_CTRL	(PAD_CTL_PUS_47K_UP |	\
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| 			 PAD_CTL_SPEED_MED |	\
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| 			 PAD_CTL_DSE_40ohm |	\
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| 			 PAD_CTL_HYS)
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| 
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| static iomux_v3_cfg_t const enet_pads[] = {
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| 	MX6_PAD_ENET_MDIO__ENET_MDIO		| MUX_PAD_CTRL(ENET_PAD_CTRL),
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| 	MX6_PAD_ENET_MDC__ENET_MDC		| MUX_PAD_CTRL(ENET_PAD_CTRL),
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| 	MX6_PAD_RGMII_TXC__RGMII_TXC		| MUX_PAD_CTRL(ENET_PAD_CTRL),
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| 	MX6_PAD_RGMII_TD0__RGMII_TD0		| MUX_PAD_CTRL(ENET_PAD_CTRL),
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| 	MX6_PAD_RGMII_TD1__RGMII_TD1		| MUX_PAD_CTRL(ENET_PAD_CTRL),
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| 	MX6_PAD_RGMII_TD2__RGMII_TD2		| MUX_PAD_CTRL(ENET_PAD_CTRL),
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| 	MX6_PAD_RGMII_TD3__RGMII_TD3		| MUX_PAD_CTRL(ENET_PAD_CTRL),
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| 	MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL	| MUX_PAD_CTRL(ENET_PAD_CTRL),
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| 	MX6_PAD_ENET_REF_CLK__ENET_TX_CLK	| MUX_PAD_CTRL(ENET_PAD_CTRL),
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| 	MX6_PAD_RGMII_RXC__RGMII_RXC		| MUX_PAD_CTRL(ENET_PAD_CTRL),
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| 	MX6_PAD_RGMII_RD0__RGMII_RD0		| MUX_PAD_CTRL(ENET_PAD_CTRL),
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| 	MX6_PAD_RGMII_RD1__RGMII_RD1		| MUX_PAD_CTRL(ENET_PAD_CTRL),
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| 	MX6_PAD_RGMII_RD2__RGMII_RD2		| MUX_PAD_CTRL(ENET_PAD_CTRL),
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| 	MX6_PAD_RGMII_RD3__RGMII_RD3		| MUX_PAD_CTRL(ENET_PAD_CTRL),
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| 	MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL	| MUX_PAD_CTRL(ENET_PAD_CTRL),
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| };
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| 
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| void seco_mx6_setup_enet_iomux(void)
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| {
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| 	imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads));
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| }
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| 
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| int seco_mx6_rgmii_rework(struct phy_device *phydev)
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| {
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| 	/* control data pad skew - devaddr = 0x02, register = 0x04 */
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| 	ksz9031_phy_extended_write(phydev, 0x02,
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| 				   MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW,
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| 				   MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000);
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| 	/* rx data pad skew - devaddr = 0x02, register = 0x05 */
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| 	ksz9031_phy_extended_write(phydev, 0x02,
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| 				   MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW,
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| 				   MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000);
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| 	/* tx data pad skew - devaddr = 0x02, register = 0x05 */
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| 	ksz9031_phy_extended_write(phydev, 0x02,
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| 				   MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW,
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| 				   MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000);
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| 
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| 	/* gtx and rx clock pad skew - devaddr = 0x02, register = 0x08 */
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| 	ksz9031_phy_extended_write(phydev, 0x02,
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| 				   MII_KSZ9031_EXT_RGMII_CLOCK_SKEW,
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| 				   MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x03FF);
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| 	return 0;
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| }
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| 
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| #define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP |	\
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| 			PAD_CTL_SPEED_LOW |	\
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| 			PAD_CTL_DSE_80ohm |	\
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| 			PAD_CTL_SRE_FAST  |	\
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| 			PAD_CTL_HYS)
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| 
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| static iomux_v3_cfg_t const usdhc3_pads[] = {
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| 	MX6_PAD_SD3_CLK__SD3_CLK	| MUX_PAD_CTRL(USDHC_PAD_CTRL),
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| 	MX6_PAD_SD3_CMD__SD3_CMD	| MUX_PAD_CTRL(USDHC_PAD_CTRL),
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| 	MX6_PAD_SD3_DAT0__SD3_DATA0	| MUX_PAD_CTRL(USDHC_PAD_CTRL),
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| 	MX6_PAD_SD3_DAT1__SD3_DATA1	| MUX_PAD_CTRL(USDHC_PAD_CTRL),
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| 	MX6_PAD_SD3_DAT2__SD3_DATA2	| MUX_PAD_CTRL(USDHC_PAD_CTRL),
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| 	MX6_PAD_SD3_DAT3__SD3_DATA3	| MUX_PAD_CTRL(USDHC_PAD_CTRL),
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| };
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| 
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| static iomux_v3_cfg_t const usdhc4_pads[] = {
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| 	MX6_PAD_SD4_CLK__SD4_CLK	| MUX_PAD_CTRL(USDHC_PAD_CTRL),
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| 	MX6_PAD_SD4_CMD__SD4_CMD	| MUX_PAD_CTRL(USDHC_PAD_CTRL),
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| 	MX6_PAD_SD4_DAT0__SD4_DATA0	| MUX_PAD_CTRL(USDHC_PAD_CTRL),
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| 	MX6_PAD_SD4_DAT1__SD4_DATA1	| MUX_PAD_CTRL(USDHC_PAD_CTRL),
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| 	MX6_PAD_SD4_DAT2__SD4_DATA2	| MUX_PAD_CTRL(USDHC_PAD_CTRL),
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| 	MX6_PAD_SD4_DAT3__SD4_DATA3	| MUX_PAD_CTRL(USDHC_PAD_CTRL),
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| };
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| 
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| void seco_mx6_setup_usdhc_iomux(int id)
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| {
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| 	switch (id) {
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| 	case 3:
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| 		imx_iomux_v3_setup_multiple_pads(usdhc3_pads,
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| 						 ARRAY_SIZE(usdhc3_pads));
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| 		break;
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| 
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| 	case 4:
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| 		imx_iomux_v3_setup_multiple_pads(usdhc4_pads,
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| 						 ARRAY_SIZE(usdhc4_pads));
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| 		break;
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| 
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| 	default:
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| 		printf("Warning: invalid usdhc id (%d)\n", id);
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| 		break;
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| 	}
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| }
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