284 lines
6.1 KiB
C
284 lines
6.1 KiB
C
/*
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* (C) Copyright 2010
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* Texas Instruments Incorporated, <www.ti.com>
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* Aneesh V <aneesh@ti.com>
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* Steve Sakoman <steve@sakoman.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <palmas.h>
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#include <asm/arch/omap.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/mmc_host_def.h>
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#include <tca642x.h>
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#include <usb.h>
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#include <linux/usb/gadget.h>
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#include <dwc3-uboot.h>
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#include <dwc3-omap-uboot.h>
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#include <ti-usb-phy-uboot.h>
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#include "mux_data.h"
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#if defined(CONFIG_USB_EHCI) || defined(CONFIG_USB_XHCI_OMAP)
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#include <sata.h>
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#include <usb.h>
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#include <asm/gpio.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/ehci.h>
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#include <asm/ehci-omap.h>
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#include <asm/arch/sata.h>
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#define DIE_ID_REG_BASE (OMAP54XX_L4_CORE_BASE + 0x2000)
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#define DIE_ID_REG_OFFSET 0x200
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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const struct omap_sysinfo sysinfo = {
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"Board: OMAP5432 uEVM\n"
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};
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/**
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* @brief tca642x_init - uEVM default values for the GPIO expander
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* input reg, output reg, polarity reg, configuration reg
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*/
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struct tca642x_bank_info tca642x_init[] = {
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{ .input_reg = 0x00,
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.output_reg = 0x04,
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.polarity_reg = 0x00,
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.configuration_reg = 0x80 },
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{ .input_reg = 0x00,
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.output_reg = 0x00,
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.polarity_reg = 0x00,
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.configuration_reg = 0xff },
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{ .input_reg = 0x00,
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.output_reg = 0x00,
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.polarity_reg = 0x00,
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.configuration_reg = 0x40 },
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};
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#ifdef CONFIG_USB_DWC3
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static struct dwc3_device usb_otg_ss = {
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.maximum_speed = USB_SPEED_SUPER,
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.base = OMAP5XX_USB_OTG_SS_BASE,
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.tx_fifo_resize = false,
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.index = 0,
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};
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static struct dwc3_omap_device usb_otg_ss_glue = {
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.base = (void *)OMAP5XX_USB_OTG_SS_GLUE_BASE,
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.utmi_mode = DWC3_OMAP_UTMI_MODE_SW,
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.index = 0,
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};
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static struct ti_usb_phy_device usb_phy_device = {
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.pll_ctrl_base = (void *)OMAP5XX_USB3_PHY_PLL_CTRL,
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.usb2_phy_power = (void *)OMAP5XX_USB2_PHY_POWER,
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.usb3_phy_power = (void *)OMAP5XX_USB3_PHY_POWER,
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.index = 0,
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};
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int board_usb_init(int index, enum usb_init_type init)
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{
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if (index) {
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printf("Invalid Controller Index\n");
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return -EINVAL;
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}
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if (init == USB_INIT_DEVICE) {
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usb_otg_ss.dr_mode = USB_DR_MODE_PERIPHERAL;
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usb_otg_ss_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID;
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} else {
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usb_otg_ss.dr_mode = USB_DR_MODE_HOST;
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usb_otg_ss_glue.vbus_id_status = OMAP_DWC3_ID_GROUND;
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}
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enable_usb_clocks(index);
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ti_usb_phy_uboot_init(&usb_phy_device);
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dwc3_omap_uboot_init(&usb_otg_ss_glue);
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dwc3_uboot_init(&usb_otg_ss);
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return 0;
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}
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int board_usb_cleanup(int index, enum usb_init_type init)
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{
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if (index) {
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printf("Invalid Controller Index\n");
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return -EINVAL;
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}
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ti_usb_phy_uboot_exit(index);
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dwc3_uboot_exit(index);
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dwc3_omap_uboot_exit(index);
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disable_usb_clocks(index);
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return 0;
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}
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int usb_gadget_handle_interrupts(int index)
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{
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u32 status;
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status = dwc3_omap_uboot_interrupt_status(index);
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if (status)
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dwc3_uboot_handle_interrupt(index);
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return 0;
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}
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#endif
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/**
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* @brief board_init
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*
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* @return 0
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*/
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int board_init(void)
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{
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gpmc_init();
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gd->bd->bi_arch_number = MACH_TYPE_OMAP5_SEVM;
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gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */
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tca642x_set_inital_state(CONFIG_SYS_I2C_TCA642X_ADDR, tca642x_init);
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return 0;
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}
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int board_eth_init(bd_t *bis)
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{
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return 0;
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}
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#if defined(CONFIG_USB_EHCI) || defined(CONFIG_USB_XHCI_OMAP)
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static void enable_host_clocks(void)
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{
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int auxclk;
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int hs_clk_ctrl_val = (OPTFCLKEN_HSIC60M_P3_CLK |
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OPTFCLKEN_HSIC480M_P3_CLK |
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OPTFCLKEN_HSIC60M_P2_CLK |
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OPTFCLKEN_HSIC480M_P2_CLK |
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OPTFCLKEN_UTMI_P3_CLK | OPTFCLKEN_UTMI_P2_CLK);
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/* Enable port 2 and 3 clocks*/
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setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, hs_clk_ctrl_val);
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/* Enable port 2 and 3 usb host ports tll clocks*/
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setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl,
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(OPTFCLKEN_USB_CH1_CLK_ENABLE | OPTFCLKEN_USB_CH2_CLK_ENABLE));
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#ifdef CONFIG_USB_XHCI_OMAP
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/* Enable the USB OTG Super speed clocks */
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setbits_le32((*prcm)->cm_l3init_usb_otg_ss_clkctrl,
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(OPTFCLKEN_REFCLK960M | OTG_SS_CLKCTRL_MODULEMODE_HW));
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#endif
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auxclk = readl((*prcm)->scrm_auxclk1);
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/* Request auxilary clock */
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auxclk |= AUXCLK_ENABLE_MASK;
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writel(auxclk, (*prcm)->scrm_auxclk1);
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}
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#endif
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/**
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* @brief misc_init_r - Configure EVM board specific configurations
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* such as power configurations, ethernet initialization as phase2 of
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* boot sequence
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*
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* @return 0
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*/
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int misc_init_r(void)
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{
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#ifdef CONFIG_PALMAS_POWER
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palmas_init_settings();
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#endif
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omap_die_id_usbethaddr();
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return 0;
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}
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void set_muxconf_regs(void)
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{
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do_set_mux((*ctrl)->control_padconf_core_base,
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core_padconf_array_essential,
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sizeof(core_padconf_array_essential) /
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sizeof(struct pad_conf_entry));
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do_set_mux((*ctrl)->control_padconf_wkup_base,
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wkup_padconf_array_essential,
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sizeof(wkup_padconf_array_essential) /
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sizeof(struct pad_conf_entry));
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}
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#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC)
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int board_mmc_init(bd_t *bis)
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{
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omap_mmc_init(0, 0, 0, -1, -1);
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omap_mmc_init(1, 0, 0, -1, -1);
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return 0;
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}
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#endif
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#ifdef CONFIG_USB_EHCI
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static struct omap_usbhs_board_data usbhs_bdata = {
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.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
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.port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,
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.port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
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};
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int ehci_hcd_init(int index, enum usb_init_type init,
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struct ehci_hccr **hccr, struct ehci_hcor **hcor)
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{
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int ret;
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enable_host_clocks();
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ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
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if (ret < 0) {
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puts("Failed to initialize ehci\n");
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return ret;
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}
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return 0;
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}
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int ehci_hcd_stop(void)
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{
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int ret;
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ret = omap_ehci_hcd_stop();
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return ret;
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}
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void usb_hub_reset_devices(int port)
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{
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/* The LAN9730 needs to be reset after the port power has been set. */
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if (port == 3) {
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gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 0);
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udelay(10);
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gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 1);
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}
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}
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#endif
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#ifdef CONFIG_USB_XHCI_OMAP
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/**
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* @brief board_usb_init - Configure EVM board specific configurations
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* for the LDO's and clocks for the USB blocks.
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*
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* @return 0
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*/
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int board_usb_init(int index, enum usb_init_type init)
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{
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int ret;
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#ifdef CONFIG_PALMAS_USB_SS_PWR
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ret = palmas_enable_ss_ldo();
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#endif
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enable_host_clocks();
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return 0;
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}
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#endif
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