198 lines
		
	
	
		
			6.2 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
			
		
		
	
	
			198 lines
		
	
	
		
			6.2 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
| menu "SPI Support"
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| 
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| config DM_SPI
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| 	bool "Enable Driver Model for SPI drivers"
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| 	depends on DM
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| 	help
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| 	  Enable driver model for SPI. The SPI slave interface
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| 	  (spi_setup_slave(), spi_xfer(), etc.) is then implemented by
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| 	  the SPI uclass. Drivers provide methods to access the SPI
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| 	  buses that they control. The uclass interface is defined in
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| 	  include/spi.h. The existing spi_slave structure is attached
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| 	  as 'parent data' to every slave on each bus. Slaves
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| 	  typically use driver-private data instead of extending the
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| 	  spi_slave structure.
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| 
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| if DM_SPI
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| 
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| config ALTERA_SPI
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| 	bool "Altera SPI driver"
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| 	help
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| 	  Enable the Altera SPI driver. This driver can be used to
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| 	  access the SPI NOR flash on platforms embedding this Altera
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| 	  IP core. Please find details on the "Embedded Peripherals IP
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| 	  User Guide" of Altera.
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| 
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| config ATH79_SPI
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| 	bool "Atheros SPI driver"
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| 	depends on ARCH_ATH79
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| 	help
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| 	  Enable the Atheros ar7xxx/ar9xxx SoC SPI driver, it was used
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| 	  to access SPI NOR flash and other SPI peripherals. This driver
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| 	  uses driver model and requires a device tree binding to operate.
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| 	  please refer to doc/device-tree-bindings/spi/spi-ath79.txt.
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| 
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| config CADENCE_QSPI
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| 	bool "Cadence QSPI driver"
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| 	help
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| 	  Enable the Cadence Quad-SPI (QSPI) driver. This driver can be
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| 	  used to access the SPI NOR flash on platforms embedding this
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| 	  Cadence IP core.
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| 
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| config DESIGNWARE_SPI
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| 	bool "Designware SPI driver"
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| 	help
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| 	  Enable the Designware SPI driver. This driver can be used to
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| 	  access the SPI NOR flash on platforms embedding this Designware
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| 	  IP core.
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| 
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| config EXYNOS_SPI
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| 	bool "Samsung Exynos SPI driver"
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| 	help
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| 	  Enable the Samsung Exynos SPI driver. This driver can be used to
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| 	  access the SPI NOR flash on platforms embedding this Samsung
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| 	  Exynos IP core.
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| 
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| config FSL_DSPI
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| 	bool "Freescale DSPI driver"
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| 	help
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| 	  Enable the Freescale DSPI driver. This driver can be used to
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| 	  access the SPI NOR flash and SPI Data flash on platforms embedding
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| 	  this Freescale DSPI IP core. LS102xA and Colibri VF50/VF61 platforms
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| 	  use this driver.
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| 
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| config FSL_QSPI
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| 	bool "Freescale QSPI driver"
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| 	help
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| 	  Enable the Freescale Quad-SPI (QSPI) driver. This driver can be
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| 	  used to access the SPI NOR flash on platforms embedding this
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| 	  Freescale IP core.
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| 
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| config ICH_SPI
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| 	bool "Intel ICH SPI driver"
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| 	help
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| 	  Enable the Intel ICH SPI driver. This driver can be used to
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| 	  access the SPI NOR flash on platforms embedding this Intel
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| 	  ICH IP core.
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| 
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| config PIC32_SPI
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| 	bool "Microchip PIC32 SPI driver"
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| 	depends on MACH_PIC32
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| 	help
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| 	  Enable the Microchip PIC32 SPI driver. This driver can be used
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| 	  to access the SPI NOR flash, MMC-over-SPI on platforms based on
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| 	  Microchip PIC32 family devices.
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| 
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| config ROCKCHIP_SPI
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| 	bool "Rockchip SPI driver"
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| 	help
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| 	  Enable the Rockchip SPI driver, used to access SPI NOR flash and
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| 	  other SPI peripherals (such as the Chrome OS EC) on Rockchip SoCs.
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| 	  This uses driver model and requires a device tree binding to
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| 	  operate.
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| 
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| config SANDBOX_SPI
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| 	bool "Sandbox SPI driver"
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| 	depends on SANDBOX && DM
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| 	help
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| 	  Enable SPI support for sandbox. This is an emulation of a real SPI
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| 	  bus. Devices can be attached to the bus using the device tree
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| 	  which specifies the driver to use. As an example, see this device
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| 	  tree fragment from sandbox.dts. It shows that the SPI bus has a
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| 	  single flash device on chip select 0 which is emulated by the driver
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| 	  for "sandbox,spi-flash", which is in drivers/mtd/spi/sandbox.c.
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| 
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| 	  spi@0 {
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| 		#address-cells = <1>;
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| 		#size-cells = <0>;
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| 		reg = <0>;
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| 		compatible = "sandbox,spi";
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| 		cs-gpios = <0>, <&gpio_a 0>;
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| 		flash@0 {
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| 			reg = <0>;
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| 			compatible = "spansion,m25p16", "sandbox,spi-flash";
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| 			spi-max-frequency = <40000000>;
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| 			sandbox,filename = "spi.bin";
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| 		};
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| 	  };
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| 
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| config TEGRA114_SPI
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| 	bool "nVidia Tegra114 SPI driver"
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| 	help
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| 	  Enable the nVidia Tegra114 SPI driver. This driver can be used to
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| 	  access the SPI NOR flash on platforms embedding this nVidia Tegra114
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| 	  IP core.
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| 
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| 	  This controller is different than the older SoCs SPI controller and
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| 	  also register interface get changed with this controller.
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| 
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| config TEGRA20_SFLASH
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| 	bool "nVidia Tegra20 Serial Flash controller driver"
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| 	help
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| 	  Enable the nVidia Tegra20 Serial Flash controller driver. This driver
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| 	  can be used to access the SPI NOR flash on platforms embedding this
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| 	  nVidia Tegra20 IP core.
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| 
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| config TEGRA20_SLINK
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| 	bool "nVidia Tegra20/Tegra30 SLINK driver"
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| 	help
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| 	  Enable the nVidia Tegra20/Tegra30 SLINK driver. This driver can
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| 	  be used to access the SPI NOR flash on platforms embedding this
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| 	  nVidia Tegra20/Tegra30 IP cores.
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| 
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| config TEGRA210_QSPI
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| 	bool "nVidia Tegra210 QSPI driver"
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| 	help
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| 	  Enable the Tegra Quad-SPI (QSPI) driver for T210. This driver
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| 	  be used to access SPI chips on platforms embedding this
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| 	  NVIDIA Tegra210 IP core.
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| 
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| config XILINX_SPI
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| 	bool "Xilinx SPI driver"
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| 	help
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| 	  Enable the Xilinx SPI driver from the Xilinx EDK. This SPI
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| 	  controller support 8 bit SPI transfers only, with or w/o FIFO.
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| 	  For more info on Xilinx SPI Register Definitions and Overview
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| 	  see driver file - drivers/spi/xilinx_spi.c
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| 
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| config ZYNQ_SPI
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| 	bool "Zynq SPI driver"
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| 	depends on ARCH_ZYNQ || ARCH_ZYNQMP
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| 	help
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| 	  Enable the Zynq SPI driver. This driver can be used to
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| 	  access the SPI NOR flash on platforms embedding this Zynq
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| 	  SPI IP core.
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| 
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| config ZYNQ_QSPI
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| 	bool "Zynq QSPI driver"
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| 	depends on ARCH_ZYNQ
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| 	help
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| 	  Enable the Zynq Quad-SPI (QSPI) driver. This driver can be
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| 	  used to access the SPI NOR flash on platforms embedding this
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| 	  Zynq QSPI IP core. This IP is used to connect the flash in
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| 	  4-bit qspi, 8-bit dual stacked and shared 4-bit dual parallel.
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| 
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| config OMAP3_SPI
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| 	bool "McSPI driver for OMAP"
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| 	help
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| 	  SPI master controller for OMAP24XX and later Multichannel SPI
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| 	  (McSPI). This driver be used to access SPI chips on platforms
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| 	  embedding this OMAP3 McSPI IP core.
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| 
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| endif # if DM_SPI
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| 
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| config FSL_ESPI
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| 	bool "Freescale eSPI driver"
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| 	help
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| 	  Enable the Freescale eSPI driver. This driver can be used to
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| 	  access the SPI interface and SPI NOR flash on platforms embedding
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| 	  this Freescale eSPI IP core.
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| 
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| config TI_QSPI
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| 	bool "TI QSPI driver"
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| 	help
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| 	  Enable the TI Quad-SPI (QSPI) driver for DRA7xx and AM43xx evms.
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| 	  This driver support spi flash single, quad and memory reads.
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| 
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| endmenu # menu "SPI Support"
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