174 lines
		
	
	
		
			4.5 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			174 lines
		
	
	
		
			4.5 KiB
		
	
	
	
		
			C
		
	
	
	
| /*
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|  * U-Boot - Configuration file for BF537 STAMP board
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|  */
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| 
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| #ifndef __CONFIG_BF527_EZKIT_H__
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| #define __CONFIG_BF527_EZKIT_H__
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| 
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| #include <asm/config-pre.h>
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| 
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| /*
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|  * Processor Settings
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|  */
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| #define CONFIG_BFIN_CPU             bf527-0.0
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| #define CONFIG_BFIN_BOOT_MODE       BFIN_BOOT_PARA
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| 
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| /*
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|  * Clock Settings
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|  *	CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
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|  *	SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
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|  */
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| /* CONFIG_CLKIN_HZ is any value in Hz					*/
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| #define CONFIG_CLKIN_HZ			25000000
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| /* CLKIN_HALF controls the DF bit in PLL_CTL      0 = CLKIN		*/
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| /*                                                1 = CLKIN / 2		*/
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| #define CONFIG_CLKIN_HALF		0
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| /* PLL_BYPASS controls the BYPASS bit in PLL_CTL  0 = do not bypass	*/
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| /*                                                1 = bypass PLL	*/
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| #define CONFIG_PLL_BYPASS		0
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| /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL		*/
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| /* Values can range from 0-63 (where 0 means 64)			*/
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| #define CONFIG_VCO_MULT			21
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| /* CCLK_DIV controls the core clock divider				*/
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| /* Values can be 1, 2, 4, or 8 ONLY					*/
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| #define CONFIG_CCLK_DIV			1
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| /* SCLK_DIV controls the system clock divider				*/
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| /* Values can range from 1-15						*/
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| #define CONFIG_SCLK_DIV			4
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| 
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| /*
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|  * Memory Settings
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|  */
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| #define CONFIG_MEM_ADD_WDTH	10
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| #define CONFIG_MEM_SIZE		64
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| 
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| #define CONFIG_EBIU_SDRRC_VAL	0x03F6
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| #define CONFIG_EBIU_SDGCTL_VAL	(SCTLE | CL_3 | PASR_ALL | TRAS_6 | TRP_3 | TRCD_3 | TWR_2 | PSS)
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| 
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| #define CONFIG_EBIU_AMGCTL_VAL	(AMCKEN | AMBEN_ALL)
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| #define CONFIG_EBIU_AMBCTL0_VAL	(B1WAT_15 | B1RAT_15 | B1HT_3 | B1RDYPOL | B0WAT_15 | B0RAT_15 | B0HT_3 | B0RDYPOL)
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| #define CONFIG_EBIU_AMBCTL1_VAL	(B3WAT_15 | B3RAT_15 | B3HT_3 | B3RDYPOL | B2WAT_15 | B2RAT_15 | B2HT_3 | B2RDYPOL)
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| 
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| #define CONFIG_SYS_MONITOR_LEN	(768 * 1024)
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| #define CONFIG_SYS_MALLOC_LEN	(640 * 1024)
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| 
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| /*
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|  * NAND Settings
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|  * (can't be used same time as ethernet)
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|  */
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| #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND)
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| # define CONFIG_BFIN_NFC
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| # define CONFIG_BFIN_NFC_BOOTROM_ECC
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| #endif
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| #ifdef CONFIG_BFIN_NFC
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| #define CONFIG_BFIN_NFC_CTL_VAL	0x0033
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| #define CONFIG_DRIVER_NAND_BFIN
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| #define CONFIG_SYS_NAND_BASE		0 /* not actually used */
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| #define CONFIG_SYS_MAX_NAND_DEVICE	1
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| #endif
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| 
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| /*
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|  * Network Settings
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|  */
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| #if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) && \
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|     !defined(__ADSPBF524__) && !defined(__ADSPBF525__) && !defined(CONFIG_BFIN_NFC)
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| #define ADI_CMDS_NETWORK	1
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| #define CONFIG_BFIN_MAC
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| #define CONFIG_RMII
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| #define CONFIG_NETCONSOLE	1
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| #endif
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| #define CONFIG_HOSTNAME		bf527-ezkit
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| 
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| /*
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|  * Flash Settings
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|  */
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| #define CONFIG_FLASH_CFI_DRIVER
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| #define CONFIG_SYS_FLASH_BASE		0x20000000
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| #define CONFIG_SYS_FLASH_CFI
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| #define CONFIG_SYS_FLASH_PROTECTION
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| #define CONFIG_SYS_MAX_FLASH_BANKS	1
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| #define CONFIG_SYS_MAX_FLASH_SECT	259
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| 
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| /*
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|  * SPI Settings
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|  */
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| #define CONFIG_BFIN_SPI
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| #define CONFIG_ENV_SPI_MAX_HZ	30000000
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| #define CONFIG_SF_DEFAULT_SPEED	30000000
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| 
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| /*
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|  * Env Storage Settings
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|  */
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| #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER)
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| #define CONFIG_ENV_IS_IN_SPI_FLASH
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| #define CONFIG_ENV_OFFSET	0x10000
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| #define CONFIG_ENV_SIZE		0x2000
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| #define CONFIG_ENV_SECT_SIZE	0x10000
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| #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
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| #elif (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND)
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| #define CONFIG_ENV_IS_IN_NAND
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| #define CONFIG_ENV_OFFSET	0x40000
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| #define CONFIG_ENV_SIZE		0x20000
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| #else
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| #define CONFIG_ENV_IS_IN_FLASH
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| #define CONFIG_ENV_OFFSET	0x4000
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| #define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
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| #define CONFIG_ENV_SIZE		0x2000
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| #define CONFIG_ENV_SECT_SIZE	0x2000
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| #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
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| #endif
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| 
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| /*
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|  * I2C Settings
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|  */
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| #define CONFIG_SYS_I2C
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| #define CONFIG_SYS_I2C_ADI
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| 
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| /*
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|  * USB Settings
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|  */
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| #if !defined(__ADSPBF522__) && !defined(__ADSPBF523__)
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| #define CONFIG_USB_MUSB_HCD
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| #define CONFIG_USB_BLACKFIN
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| #define CONFIG_USB_STORAGE
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| #define CONFIG_USB_MUSB_TIMEOUT 100000
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| #endif
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| 
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| /* Don't waste time transferring a logo over the UART */
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| #if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_UART)
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| /*# define CONFIG_VIDEO*/
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| #endif
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| 
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| /*
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|  * Video Settings
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|  */
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| #ifdef CONFIG_VIDEO
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| #ifdef CONFIG_BF527_EZKIT_REV_2_1
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| # define CONFIG_LQ035Q1_SPI_BUS	0
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| # define CONFIG_LQ035Q1_SPI_CS	7
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| # define CONFIG_LQ035Q1_USE_RGB565_8_BIT_PPI
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| #else
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| # define CONFIG_LQ035Q1_USE_RGB888_8_BIT_PPI
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| #endif
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| 
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| #ifdef CONFIG_LQ035Q1_USE_RGB565_8_BIT_PPI
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| # define EASYLOGO_HEADER <asm/bfin_logo_rgb565_230x230_lzma.h>
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| #else
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| # define EASYLOGO_HEADER <asm/bfin_logo_230x230_lzma.h>
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| #endif
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| #endif /* CONFIG_VIDEO */
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| 
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| /*
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|  * Misc Settings
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|  */
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| #define CONFIG_MISC_INIT_R
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| #define CONFIG_RTC_BFIN
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| #define CONFIG_UART_CONSOLE	1
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| 
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| /*
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|  * Pull in common ADI header for remaining command/environment setup
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|  */
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| #include <configs/bfin_adi_common.h>
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| 
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| #endif
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