98 lines
		
	
	
		
			2.7 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			98 lines
		
	
	
		
			2.7 KiB
		
	
	
	
		
			C
		
	
	
	
| /*
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|  * U-Boot - Configuration file for CM-BF533 board
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|  */
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| 
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| #ifndef __CONFIG_CM_BF533_H__
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| #define __CONFIG_CM_BF533_H__
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| 
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| #include <asm/config-pre.h>
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| 
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| /*
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|  * Processor Settings
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|  */
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| #define CONFIG_BFIN_CPU             bf533-0.3
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| #define CONFIG_BFIN_BOOT_MODE       BFIN_BOOT_BYPASS
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| 
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| /*
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|  * Clock Settings
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|  *	CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
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|  *	SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
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|  */
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| /* CONFIG_CLKIN_HZ is any value in Hz					*/
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| #define CONFIG_CLKIN_HZ			25000000
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| /* CLKIN_HALF controls the DF bit in PLL_CTL      0 = CLKIN		*/
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| /*                                                1 = CLKIN / 2		*/
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| #define CONFIG_CLKIN_HALF		0
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| /* PLL_BYPASS controls the BYPASS bit in PLL_CTL  0 = do not bypass	*/
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| /*                                                1 = bypass PLL	*/
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| #define CONFIG_PLL_BYPASS		0
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| /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL		*/
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| /* Values can range from 0-63 (where 0 means 64)			*/
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| #define CONFIG_VCO_MULT			22
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| /* CCLK_DIV controls the core clock divider				*/
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| /* Values can be 1, 2, 4, or 8 ONLY					*/
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| #define CONFIG_CCLK_DIV			1
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| /* SCLK_DIV controls the system clock divider				*/
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| /* Values can range from 1-15						*/
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| #define CONFIG_SCLK_DIV			5
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| 
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| /* Decrease core voltage */
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| #define CONFIG_VR_CTL_VAL (VLEV_115 | GAIN_20 | FREQ_1000)
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| 
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| /*
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|  * Memory Settings
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|  */
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| #define CONFIG_MEM_ADD_WDTH	9
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| #define CONFIG_MEM_SIZE		32
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| 
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| #define CONFIG_EBIU_SDRRC_VAL	((((CONFIG_SCLK_HZ / 1000) * 64) / 8192) - (7 + 2))
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| #define CONFIG_EBIU_SDGCTL_VAL	(SCTLE | PSS | TWR_2 | TRCD_2 | TRP_2 | TRAS_7 | PASR_ALL | CL_3)
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| 
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| #define CONFIG_EBIU_AMGCTL_VAL	(AMBEN_ALL)
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| #define CONFIG_EBIU_AMBCTL0_VAL	(B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3)
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| #define CONFIG_EBIU_AMBCTL1_VAL	(B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3)
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| 
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| #define CONFIG_SYS_MONITOR_LEN	(256 * 1024)
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| #define CONFIG_SYS_MALLOC_LEN	(128 * 1024)
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| 
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| /*
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|  * Network Settings
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|  */
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| #define ADI_CMDS_NETWORK	1
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| #define CONFIG_SMC91111	1
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| #define CONFIG_SMC91111_BASE	0x20200300
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| #define CONFIG_HOSTNAME		cm-bf533
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| 
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| /*
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|  * Flash Settings
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|  */
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| #define CONFIG_FLASH_CFI_DRIVER
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| #define CONFIG_SYS_FLASH_BASE		0x20000000
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| #define CONFIG_SYS_FLASH_CFI
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| #define CONFIG_SYS_FLASH_PROTECTION
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| #define CONFIG_SYS_MAX_FLASH_BANKS	1
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| #define CONFIG_SYS_MAX_FLASH_SECT	16
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| 
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| /*
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|  * Env Storage Settings
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|  */
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| #define CONFIG_ENV_IS_IN_FLASH	1
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| #define CONFIG_ENV_OFFSET	0x20000
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| #define CONFIG_ENV_SECT_SIZE	0x20000
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| #define CONFIG_ENV_SIZE		0x10000
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| 
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| /*
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|  * Misc Settings
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|  */
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| #define CONFIG_BAUDRATE		115200
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| #define CONFIG_UART_CONSOLE	0
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| #define CONFIG_BOOTCOMMAND	"run flashboot"
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| #define FLASHBOOT_ENV_SETTINGS	"flashboot=bootm 0x20040000\0"
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| 
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| /*
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|  * Pull in common ADI header for remaining command/environment setup
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|  */
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| #include <configs/bfin_adi_common.h>
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| 
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| #endif
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