89 lines
		
	
	
		
			2.0 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			89 lines
		
	
	
		
			2.0 KiB
		
	
	
	
		
			C
		
	
	
	
| /*
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|  * (C) Copyright 2012
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|  * Corscience GmbH & Co. KG, <www.corscience.de>
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|  * Thomas Weber <weber@corscience.de>
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|  * Sunil Kumar <sunilsaini05@gmail.com>
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|  * Shashi Ranjan <shashiranjanmca05@gmail.com>
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|  *
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|  * Derived from Devkit8000 code by
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|  * Frederik Kriewitz <frederik@kriewitz.eu>
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| #include <common.h>
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| #include <twl4030.h>
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| #include <asm/io.h>
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| #include <asm/arch/mmc_host_def.h>
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| #include <asm/arch/mux.h>
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| #include <asm/arch/sys_proto.h>
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| #include <asm/arch/mem.h>
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| #include "tricorder.h"
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| 
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| DECLARE_GLOBAL_DATA_PTR;
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| 
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| /*
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|  * Routine: board_init
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|  * Description: Early hardware init.
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|  */
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| int board_init(void)
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| {
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| 	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
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| 	/* boot param addr */
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| 	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
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| 
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| 	return 0;
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| }
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| 
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| /*
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|  * Routine: misc_init_r
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|  * Description: Configure board specific parts
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|  */
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| int misc_init_r(void)
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| {
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| 	twl4030_power_init();
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| #ifdef CONFIG_TWL4030_LED
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| 	twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
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| #endif
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| 
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| 	dieid_num_r();
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| 
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| 	return 0;
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| }
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| 
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| /*
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|  * Routine: set_muxconf_regs
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|  * Description: Setting up the configuration Mux registers specific to the
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|  *		hardware. Many pins need to be moved from protect to primary
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|  *		mode.
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|  */
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| void set_muxconf_regs(void)
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| {
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| 	MUX_TRICORDER();
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| }
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| 
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| #if defined(CONFIG_GENERIC_MMC) && !(defined(CONFIG_SPL_BUILD))
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| int board_mmc_init(bd_t *bis)
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| {
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| 	return omap_mmc_init(0, 0, 0, -1, -1);
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| }
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| #endif
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| 
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| /*
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|  * Routine: get_board_mem_timings
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|  * Description: If we use SPL then there is no x-loader nor config header
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|  * so we have to setup the DDR timings ourself on the first bank.  This
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|  * provides the timing values back to the function that configures
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|  * the memory.  We have either one or two banks of 128MB DDR.
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|  */
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| void get_board_mem_timings(struct board_sdrc_timings *timings)
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| {
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| 	/* General SDRC config */
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| 	timings->mcfg = MICRON_V_MCFG_165(128 << 20);
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| 	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
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| 
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| 	/* AC timings */
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| 	timings->ctrla = MICRON_V_ACTIMA_165;
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| 	timings->ctrlb = MICRON_V_ACTIMB_165;
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| 	timings->mr = MICRON_V_MR_165;
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| }
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