44 lines
		
	
	
		
			1.5 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			44 lines
		
	
	
		
			1.5 KiB
		
	
	
	
		
			C
		
	
	
	
| #ifndef __MVBC_H__
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| #define __MVBC_H__
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| 
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| #define LED_G0          MPC5XXX_GPIO_SIMPLE_PSC2_0
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| #define LED_G1          MPC5XXX_GPIO_SIMPLE_PSC2_1
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| #define LED_Y           MPC5XXX_GPIO_SIMPLE_PSC2_2
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| #define LED_R           MPC5XXX_GPIO_SIMPLE_PSC2_3
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| #define ARB_X_EN        MPC5XXX_GPIO_WKUP_PSC2_4
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| 
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| #define FPGA_DIN        MPC5XXX_GPIO_SIMPLE_PSC3_0
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| #define FPGA_CCLK       MPC5XXX_GPIO_SIMPLE_PSC3_1
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| #define FPGA_CONF_DONE  MPC5XXX_GPIO_SIMPLE_PSC3_2
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| #define FPGA_CONFIG     MPC5XXX_GPIO_SIMPLE_PSC3_3
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| #define FPGA_STATUS     MPC5XXX_GPIO_SINT_PSC3_4
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| 
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| #define MAN_RST         MPC5XXX_GPIO_WKUP_PSC6_0
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| #define WD_TS           MPC5XXX_GPIO_WKUP_PSC6_1
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| #define WD_WDI          MPC5XXX_GPIO_SIMPLE_PSC6_2
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| #define COP_PRESENT     MPC5XXX_GPIO_SIMPLE_PSC6_3
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| #define FACT_RST        MPC5XXX_GPIO_WKUP_6
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| #define FLASH_RBY       MPC5XXX_GPIO_WKUP_7
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| 
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| #define SIMPLE_DDR      (LED_G0 | LED_G1 | LED_Y | LED_R | \
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| 			 FPGA_DIN | FPGA_CCLK | FPGA_CONFIG | WD_WDI)
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| #define SIMPLE_DVO      (FPGA_CONFIG)
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| #define SIMPLE_ODE      (FPGA_CONFIG | LED_G0 | LED_G1 | LED_Y | LED_R)
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| #define SIMPLE_GPIOEN   (LED_G0 | LED_G1 | LED_Y | LED_R | \
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| 			 FPGA_DIN | FPGA_CCLK | FPGA_CONF_DONE | FPGA_CONFIG |\
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| 			 WD_WDI | COP_PRESENT)
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| 
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| #define SINT_ODE        0
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| #define SINT_DDR        0
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| #define SINT_DVO        0
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| #define SINT_INTEN      0
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| #define SINT_ITYPE      0
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| #define SINT_GPIOEN     (FPGA_STATUS)
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| 
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| #define WKUP_ODE        (MAN_RST)
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| #define WKUP_DIR        (ARB_X_EN|MAN_RST|WD_TS)
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| #define WKUP_DO         (ARB_X_EN|MAN_RST|WD_TS)
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| #define WKUP_EN         (ARB_X_EN|MAN_RST|WD_TS|FACT_RST|FLASH_RBY)
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| 
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| #endif
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