111 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			111 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
// SPDX-License-Identifier: GPL-2.0+
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/*
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 * Copyright (C) 2016 Atmel Corporation
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 *               Wenyou.Yang <wenyou.yang@atmel.com>
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 */
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#include <common.h>
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#include <clk-uclass.h>
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#include <dm.h>
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#include <linux/io.h>
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#include <mach/at91_pmc.h>
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#include "pmc.h"
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#define SYSTEM_MAX_ID		31
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/**
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 * at91_system_clk_bind() - for the system clock driver
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 * Recursively bind its children as clk devices.
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 *
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 * @return: 0 on success, or negative error code on failure
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 */
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static int at91_system_clk_bind(struct udevice *dev)
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{
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	return at91_clk_sub_device_bind(dev, "system-clk");
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}
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static const struct udevice_id at91_system_clk_match[] = {
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	{ .compatible = "atmel,at91rm9200-clk-system" },
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	{}
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};
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U_BOOT_DRIVER(at91_system_clk) = {
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	.name = "at91-system-clk",
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	.id = UCLASS_MISC,
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	.of_match = at91_system_clk_match,
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	.bind = at91_system_clk_bind,
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};
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/*----------------------------------------------------------*/
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static inline int is_pck(int id)
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{
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	return (id >= 8) && (id <= 15);
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}
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static ulong system_clk_get_rate(struct clk *clk)
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{
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	struct clk clk_dev;
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	int ret;
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	ret = clk_get_by_index(clk->dev, 0, &clk_dev);
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	if (ret)
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		return -EINVAL;
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	return clk_get_rate(&clk_dev);
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}
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static ulong system_clk_set_rate(struct clk *clk, ulong rate)
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{
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	struct clk clk_dev;
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	int ret;
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	ret = clk_get_by_index(clk->dev, 0, &clk_dev);
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	if (ret)
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		return -EINVAL;
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	return clk_set_rate(&clk_dev, rate);
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}
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static int system_clk_enable(struct clk *clk)
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{
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	struct pmc_platdata *plat = dev_get_platdata(clk->dev);
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	struct at91_pmc *pmc = plat->reg_base;
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	u32 mask;
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	if (clk->id > SYSTEM_MAX_ID)
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		return -EINVAL;
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	mask = BIT(clk->id);
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	writel(mask, &pmc->scer);
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	/**
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	 * For the programmable clocks the Ready status in the PMC
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	 * status register should be checked after enabling.
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	 * For other clocks this is unnecessary.
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	 */
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	if (!is_pck(clk->id))
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		return 0;
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	while (!(readl(&pmc->sr) & mask))
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		;
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	return 0;
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}
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static struct clk_ops system_clk_ops = {
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	.of_xlate = at91_clk_of_xlate,
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	.get_rate = system_clk_get_rate,
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	.set_rate = system_clk_set_rate,
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	.enable = system_clk_enable,
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};
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U_BOOT_DRIVER(system_clk) = {
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	.name = "system-clk",
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	.id = UCLASS_CLK,
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	.probe = at91_clk_probe,
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	.platdata_auto_alloc_size = sizeof(struct pmc_platdata),
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	.ops = &system_clk_ops,
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};
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