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u-boot/cpu/mpc8xxx/ddr
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Dave Liu c360ceac02 fsl-ddr: add the DDR3 SPD infrastructure 
- support mirrored DIMMs, not support register DIMMs
- test passed on P2020DS board with MT9JSF12872AY-1G1D1
- test passed on MPC8569MDS board with MT8JSF12864HY-1G1D1

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Travis Wheatley <travis.wheatley@freescale.com>
 		2009-03-30 13:33:50 -05:00
..
Makefile fsl-ddr: add the DDR3 SPD infrastructure 2009-03-30 13:33:50 -05:00
common_timing_params.h FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. 2008-08-27 02:05:58 +02:00
ctrl_regs.c fsl-ddr: add the DDR3 SPD infrastructure 2009-03-30 13:33:50 -05:00
ddr.h Pass dimm parameters to populate populate controller options 2008-10-18 21:54:04 +02:00
ddr1_dimm_params.c FSL DDR: Add DDR1 DIMM paramter support 2008-08-27 02:05:59 +02:00
ddr2_dimm_params.c FSL DDR: Add DDR2 DIMM paramter support 2008-08-27 02:06:00 +02:00
ddr3_dimm_params.c fsl-ddr: add the DDR3 SPD infrastructure 2009-03-30 13:33:50 -05:00
lc_common_dimm_params.c fsl-ddr: add the DDR3 SPD infrastructure 2009-03-30 13:33:50 -05:00
main.c fsl-ddr: Allow system to boot if we have more than 4G of memory 2009-02-16 18:05:55 -06:00
options.c fsl-ddr: add the DDR3 SPD infrastructure 2009-03-30 13:33:50 -05:00
util.c FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. 2008-08-27 02:05:58 +02:00