112 lines
2.4 KiB
C
112 lines
2.4 KiB
C
/*
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* include/asm-arm/macro.h
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*
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* Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_ARM_MACRO_H__
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#define __ASM_ARM_MACRO_H__
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#ifdef __ASSEMBLY__
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/*
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* These macros provide a convenient way to write 8, 16 and 32 bit data
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* to any address.
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* Registers r4 and r5 are used, any data in these registers are
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* overwritten by the macros.
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* The macros are valid for any ARM architecture, they do not implement
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* any memory barriers so caution is recommended when using these when the
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* caches are enabled or on a multi-core system.
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*/
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.macro write32, addr, data
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ldr r4, =\addr
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ldr r5, =\data
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str r5, [r4]
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.endm
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.macro write16, addr, data
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ldr r4, =\addr
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ldrh r5, =\data
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strh r5, [r4]
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.endm
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.macro write8, addr, data
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ldr r4, =\addr
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ldrb r5, =\data
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strb r5, [r4]
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.endm
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/*
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* This macro generates a loop that can be used for delays in the code.
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* Register r4 is used, any data in this register is overwritten by the
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* macro.
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* The macro is valid for any ARM architeture. The actual time spent in the
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* loop will vary from CPU to CPU though.
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*/
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.macro wait_timer, time
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ldr r4, =\time
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1:
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nop
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subs r4, r4, #1
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bcs 1b
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.endm
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#ifdef CONFIG_ARM64
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/*
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* Register aliases.
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*/
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lr .req x30
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/*
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* Branch according to exception level
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*/
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.macro switch_el, xreg, el3_label, el2_label, el1_label
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mrs \xreg, CurrentEL
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cmp \xreg, 0xc
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b.eq \el3_label
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cmp \xreg, 0x8
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b.eq \el2_label
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cmp \xreg, 0x4
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b.eq \el1_label
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.endm
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/*
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* Branch if current processor is a slave,
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* choose processor with all zero affinity value as the master.
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*/
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.macro branch_if_slave, xreg, slave_label
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mrs \xreg, mpidr_el1
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tst \xreg, #0xff /* Test Affinity 0 */
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b.ne \slave_label
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lsr \xreg, \xreg, #8
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tst \xreg, #0xff /* Test Affinity 1 */
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b.ne \slave_label
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lsr \xreg, \xreg, #8
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tst \xreg, #0xff /* Test Affinity 2 */
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b.ne \slave_label
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lsr \xreg, \xreg, #16
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tst \xreg, #0xff /* Test Affinity 3 */
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b.ne \slave_label
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.endm
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/*
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* Branch if current processor is a master,
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* choose processor with all zero affinity value as the master.
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*/
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.macro branch_if_master, xreg1, xreg2, master_label
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mrs \xreg1, mpidr_el1
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lsr \xreg2, \xreg1, #32
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lsl \xreg1, \xreg1, #40
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lsr \xreg1, \xreg1, #40
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orr \xreg1, \xreg1, \xreg2
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cbz \xreg1, \master_label
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.endm
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#endif /* CONFIG_ARM64 */
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_ARM_MACRO_H__ */
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