109 lines
2.3 KiB
C
109 lines
2.3 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2013 Soren Brinkmann <soren.brinkmann@xilinx.com>
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* Copyright (C) 2013 Xilinx, Inc. All rights reserved.
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*/
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#include <clk.h>
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#include <common.h>
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#include <dm.h>
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#include <init.h>
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#include <malloc.h>
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#include <asm/arch/clk.h>
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#include <asm/global_data.h>
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DECLARE_GLOBAL_DATA_PTR;
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static const char * const clk_names[clk_max] = {
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"armpll", "ddrpll", "iopll",
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"cpu_6or4x", "cpu_3or2x", "cpu_2x", "cpu_1x",
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"ddr2x", "ddr3x", "dci",
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"lqspi", "smc", "pcap", "gem0", "gem1",
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"fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1",
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"sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", "dma",
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"usb0_aper", "usb1_aper", "gem0_aper", "gem1_aper",
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"sdio0_aper", "sdio1_aper", "spi0_aper", "spi1_aper",
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"can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper",
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"uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper",
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"smc_aper", "swdt", "dbg_trc", "dbg_apb"
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};
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/**
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* set_cpu_clk_info() - Setup clock information
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*
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* This function is called from common code after relocation and sets up the
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* clock information.
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*/
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int set_cpu_clk_info(void)
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{
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struct clk clk;
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struct udevice *dev;
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ulong rate;
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int i, ret;
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ret = uclass_get_device_by_driver(UCLASS_CLK,
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DM_DRIVER_GET(zynq_clk), &dev);
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if (ret)
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return ret;
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for (i = 0; i < 2; i++) {
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clk.id = i ? ddr3x_clk : cpu_6or4x_clk;
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ret = clk_request(dev, &clk);
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if (ret < 0)
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return ret;
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rate = clk_get_rate(&clk) / 1000000;
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if (i)
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gd->bd->bi_ddr_freq = rate;
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else
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gd->bd->bi_arm_freq = rate;
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clk_free(&clk);
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}
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gd->bd->bi_dsp_freq = 0;
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return 0;
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}
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/**
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* soc_clk_dump() - Print clock frequencies
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* Returns zero on success
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*
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* Implementation for the clk dump command.
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*/
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int soc_clk_dump(void)
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{
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struct udevice *dev;
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int i, ret;
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ret = uclass_get_device_by_driver(UCLASS_CLK,
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DM_DRIVER_GET(zynq_clk), &dev);
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if (ret)
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return ret;
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printf("clk\t\tfrequency\n");
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for (i = 0; i < clk_max; i++) {
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const char *name = clk_names[i];
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if (name) {
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struct clk clk;
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unsigned long rate;
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clk.id = i;
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ret = clk_request(dev, &clk);
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if (ret < 0)
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return ret;
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rate = clk_get_rate(&clk);
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clk_free(&clk);
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if ((rate == (unsigned long)-ENOSYS) ||
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(rate == (unsigned long)-ENXIO))
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printf("%10s%20s\n", name, "unknown");
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else
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printf("%10s%20lu\n", name, rate);
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}
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}
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return 0;
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}
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