Dinh Nguyen 871c24bc50 ARM: socfpga: rename the cyclone5 and arria5 base address file ... When adding support for the Arria10 platform, we're going to name the file base_addr_a10.h, so to be systematic about it, rename the socfpga_base_addr.h to be base_addr_ac5.h for the Arria5 and Cyclone5 platform. Suggested-by: Marek Vasut <marex@denx.de> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>		2015-11-30 13:30:19 +01:00
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base_addr_a10.h	ARM: socfpga: arria10: add base address map for Arria10	2015-11-30 13:30:19 +01:00
base_addr_ac5.h	ARM: socfpga: rename the cyclone5 and arria5 base address file	2015-11-30 13:30:19 +01:00
clock_manager.h	arm: socfpga: clock: Clean up pll_config.h	2015-08-08 14:14:06 +02:00
dwmmc.h	mmc: dw_mmc: Probe the MMC from OF	2015-09-04 11:54:20 +02:00
fpga_manager.h	…
freeze_controller.h	…
gpio.h	…
nic301.h	…
reset_manager.h	arm: socfpga: reset: FIX address of tstscratch register	2015-11-30 13:30:19 +01:00
scan_manager.h	arm: socfpga: scan: Add code to get FPGA ID	2015-08-08 14:14:30 +02:00
scu.h	…
sdram.h	ddr: altera: sequencer: Wrap misc remaining macros	2015-08-08 14:14:29 +02:00
system_manager.h	arm: socfpga: Make the pinmux table const u8	2015-08-23 11:56:20 +02:00
timer.h	…