119 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			119 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			C
		
	
	
	
| /*
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|  * (C) Copyright 2015
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|  * Kamil Lulko, <rev13@wp.pl>
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| 
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| #include <common.h>
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| #include <asm/io.h>
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| #include <asm/armv7m.h>
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| #include <asm/arch/stm32.h>
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| 
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| DECLARE_GLOBAL_DATA_PTR;
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| 
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| #define STM32_TIM2_BASE	(STM32_APB1PERIPH_BASE + 0x0000)
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| 
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| #define RCC_APB1ENR_TIM2EN	(1 << 0)
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| 
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| struct stm32_tim2_5 {
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| 	u32 cr1;
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| 	u32 cr2;
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| 	u32 smcr;
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| 	u32 dier;
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| 	u32 sr;
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| 	u32 egr;
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| 	u32 ccmr1;
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| 	u32 ccmr2;
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| 	u32 ccer;
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| 	u32 cnt;
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| 	u32 psc;
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| 	u32 arr;
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| 	u32 reserved1;
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| 	u32 ccr1;
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| 	u32 ccr2;
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| 	u32 ccr3;
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| 	u32 ccr4;
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| 	u32 reserved2;
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| 	u32 dcr;
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| 	u32 dmar;
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| 	u32 or;
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| };
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| 
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| #define TIM_CR1_CEN	(1 << 0)
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| 
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| #define TIM_EGR_UG	(1 << 0)
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| 
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| int timer_init(void)
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| {
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| 	struct stm32_tim2_5 *tim = (struct stm32_tim2_5 *)STM32_TIM2_BASE;
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| 
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| 	setbits_le32(&STM32_RCC->apb1enr, RCC_APB1ENR_TIM2EN);
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| 
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| 	if (clock_get(CLOCK_AHB) == clock_get(CLOCK_APB1))
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| 		writel((clock_get(CLOCK_APB1) / CONFIG_SYS_HZ_CLOCK) - 1,
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| 		       &tim->psc);
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| 	else
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| 		writel(((clock_get(CLOCK_APB1) * 2) / CONFIG_SYS_HZ_CLOCK) - 1,
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| 		       &tim->psc);
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| 
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| 	writel(0xFFFFFFFF, &tim->arr);
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| 	writel(TIM_CR1_CEN, &tim->cr1);
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| 	setbits_le32(&tim->egr, TIM_EGR_UG);
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| 
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| 	gd->arch.tbl = 0;
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| 	gd->arch.tbu = 0;
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| 	gd->arch.lastinc = 0;
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| 
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| 	return 0;
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| }
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| 
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| ulong get_timer(ulong base)
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| {
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| 	return (get_ticks() / (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ)) - base;
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| }
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| 
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| unsigned long long get_ticks(void)
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| {
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| 	struct stm32_tim2_5 *tim = (struct stm32_tim2_5 *)STM32_TIM2_BASE;
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| 	u32 now;
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| 
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| 	now = readl(&tim->cnt);
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| 
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| 	if (now >= gd->arch.lastinc)
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| 		gd->arch.tbl += (now - gd->arch.lastinc);
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| 	else
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| 		gd->arch.tbl += (0xFFFFFFFF - gd->arch.lastinc) + now;
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| 
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| 	gd->arch.lastinc = now;
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| 
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| 	return gd->arch.tbl;
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| }
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| 
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| void reset_timer(void)
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| {
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| 	struct stm32_tim2_5 *tim = (struct stm32_tim2_5 *)STM32_TIM2_BASE;
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| 
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| 	gd->arch.lastinc = readl(&tim->cnt);
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| 	gd->arch.tbl = 0;
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| }
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| 
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| /* delay x useconds */
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| void __udelay(ulong usec)
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| {
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| 	unsigned long long start;
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| 
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| 	start = get_ticks();		/* get current timestamp */
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| 	while ((get_ticks() - start) < usec)
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| 		;			/* loop till time has passed */
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| }
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| 
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| /*
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|  * This function is derived from PowerPC code (timebase clock frequency).
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|  * On ARM it returns the number of timer ticks per second.
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|  */
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| ulong get_tbclk(void)
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| {
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| 	return CONFIG_SYS_HZ_CLOCK;
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| }
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