28 lines
652 B
C
28 lines
652 B
C
/*
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* Keystone2: DDR3 configuration
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*
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* (C) Copyright 2012-2014
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* Texas Instruments Incorporated, <www.ti.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __DDR3_CFG_H
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#define __DDR3_CFG_H
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extern struct ddr3_phy_config ddr3phy_1600_8g;
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extern struct ddr3_emif_config ddr3_1600_8g;
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extern struct ddr3_phy_config ddr3phy_1333_2g;
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extern struct ddr3_emif_config ddr3_1333_2g;
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extern struct ddr3_phy_config ddr3phy_1600_4g;
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extern struct ddr3_emif_config ddr3_1600_4g;
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extern struct ddr3_phy_config ddr3phy_1600_2g;
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extern struct ddr3_emif_config ddr3_1600_2g;
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int ddr3_get_dimm_params(char *dimm_name);
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#endif /* __DDR3_CFG_H */
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