88 lines
1.8 KiB
C
88 lines
1.8 KiB
C
/*
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* Copyright (C) 2013 Altera Corporation <www.altera.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _SYSTEM_MANAGER_H_
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#define _SYSTEM_MANAGER_H_
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#ifndef __ASSEMBLY__
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void sysmgr_pinmux_init(void);
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/* declaration for handoff table type */
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extern unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM];
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#endif
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#define CONFIG_SYSMGR_PINMUXGRP_OFFSET (0x400)
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#define SYSMGR_SDMMC_CTRL_SET(smplsel, drvsel) \
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((((drvsel) << 0) & 0x7) | (((smplsel) << 3) & 0x38))
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struct socfpga_system_manager {
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u32 siliconid1;
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u32 siliconid2;
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u32 _pad_0x8_0xf[2];
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u32 wddbg;
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u32 bootinfo;
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u32 hpsinfo;
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u32 parityinj;
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u32 fpgaintfgrp_gbl;
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u32 fpgaintfgrp_indiv;
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u32 fpgaintfgrp_module;
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u32 _pad_0x2c_0x2f;
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u32 scanmgrgrp_ctrl;
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u32 _pad_0x34_0x3f[3];
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u32 frzctrl_vioctrl;
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u32 _pad_0x44_0x4f[3];
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u32 frzctrl_hioctrl;
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u32 frzctrl_src;
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u32 frzctrl_hwctrl;
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u32 _pad_0x5c_0x5f;
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u32 emacgrp_ctrl;
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u32 emacgrp_l3master;
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u32 _pad_0x68_0x6f[2];
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u32 dmagrp_ctrl;
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u32 dmagrp_persecurity;
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u32 _pad_0x78_0x7f[2];
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u32 iswgrp_handoff[8];
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u32 _pad_0xa0_0xbf[8];
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u32 romcodegrp_ctrl;
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u32 romcodegrp_cpu1startaddr;
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u32 romcodegrp_initswstate;
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u32 romcodegrp_initswlastld;
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u32 romcodegrp_bootromswstate;
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u32 __pad_0xd4_0xdf[3];
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u32 romcodegrp_warmramgrp_enable;
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u32 romcodegrp_warmramgrp_datastart;
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u32 romcodegrp_warmramgrp_length;
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u32 romcodegrp_warmramgrp_execution;
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u32 romcodegrp_warmramgrp_crc;
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u32 __pad_0xf4_0xff[3];
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u32 romhwgrp_ctrl;
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u32 _pad_0x104_0x107;
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u32 sdmmcgrp_ctrl;
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u32 sdmmcgrp_l3master;
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u32 nandgrp_bootstrap;
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u32 nandgrp_l3master;
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u32 usbgrp_l3master;
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u32 _pad_0x11c_0x13f[9];
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u32 eccgrp_l2;
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u32 eccgrp_ocram;
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u32 eccgrp_usb0;
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u32 eccgrp_usb1;
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u32 eccgrp_emac0;
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u32 eccgrp_emac1;
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u32 eccgrp_dma;
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u32 eccgrp_can0;
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u32 eccgrp_can1;
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u32 eccgrp_nand;
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u32 eccgrp_qspi;
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u32 eccgrp_sdmmc;
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};
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#endif /* _SYSTEM_MANAGER_H_ */
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