62 lines
		
	
	
		
			1.7 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			62 lines
		
	
	
		
			1.7 KiB
		
	
	
	
		
			C
		
	
	
	
| /*
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|  * (C) Copyright 2009
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|  * Marvell Semiconductor <www.marvell.com>
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|  * Prafulla Wadaskar <prafulla@marvell.com>
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| 
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| #ifndef _MV88E61XX_H
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| #define _MV88E61XX_H
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| 
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| #include <miiphy.h>
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| 
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| #define MV88E61XX_CPU_PORT		0x5
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| 
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| #define MV88E61XX_PHY_TIMEOUT		100000
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| 
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| /* port dev-addr (= port + 0x10) */
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| #define MV88E61XX_PRT_OFST		0x10
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| /* port registers */
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| #define MV88E61XX_PCS_CTRL_REG		0x1
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| #define MV88E61XX_PRT_CTRL_REG		0x4
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| #define MV88E61XX_PRT_VMAP_REG		0x6
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| #define MV88E61XX_PRT_VID_REG		0x7
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| #define MV88E61XX_RGMII_TIMECTRL_REG	0x1A
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| 
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| /* global registers dev-addr */
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| #define MV88E61XX_GLBREG_DEVADR	0x1B
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| /* global registers */
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| #define MV88E61XX_SGSR			0x00
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| #define MV88E61XX_SGCR			0x04
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| 
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| /* global 2 registers dev-addr */
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| #define MV88E61XX_GLB2REG_DEVADR	0x1C
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| /* global 2 registers */
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| #define MV88E61XX_PHY_CMD		0x18
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| #define MV88E61XX_PHY_DATA		0x19
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| /* global 2 phy commands */
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| #define MV88E61XX_PHY_WRITE_CMD		0x9400
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| #define MV88E61XX_PHY_READ_CMD		0x9800
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| 
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| #define MV88E61XX_BUSY_OFST		15
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| #define MV88E61XX_MODE_OFST		12
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| #define MV88E61XX_OP_OFST		10
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| #define MV88E61XX_ADDR_OFST		5
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| 
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| #ifdef CONFIG_MV88E61XX_MULTICHIP_ADRMODE
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| static int mv88e61xx_busychk_multic(char *name, u32 devaddr);
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| static void mv88e61xx_switch_write(char *name, u32 phy_adr,
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| 	u32 reg_ofs, u16 data);
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| static void mv88e61xx_switch_read(char *name, u32 phy_adr,
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| 	u32 reg_ofs, u16 *data);
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| #define wr_switch_reg mv88e61xx_switch_write
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| #define rd_switch_reg mv88e61xx_switch_read
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| #else
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| /* switch appears a s simple PHY and can thus use miiphy */
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| #define wr_switch_reg miiphy_write
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| #define rd_switch_reg miiphy_read
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| #endif /* CONFIG_MV88E61XX_MULTICHIP_ADRMODE */
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| 
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| #endif /* _MV88E61XX_H */
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