u-boot/arch/arm/mach-socfpga/include/mach
Simon Goldschmidt cb20fe8f0b arm: socfpga: rst: add register definition for cold reset
This adds a define for the bit in rstmgr's ctrl regiser that issues
a cold reset (we had a define for the warm reset bit only) in preparation
for a proper sysrese driver.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Series changes: 2
- separate this patch to the register descriptions from the actual
  sysreset driver patch
2019-07-21 12:45:10 +02:00
..
base_addr_a10.h
base_addr_ac5.h arm: socfpga: fix SPL booting from fpga OnChip RAM 2018-11-29 12:45:15 +01:00
base_addr_s10.h
boot0.h
clock_manager.h
clock_manager_arria10.h
clock_manager_gen5.h
clock_manager_s10.h
firewall_s10.h
fpga_manager.h
fpga_manager_arria10.h spl: socfpga: Implement fpga bitstream loading with socfpga loadfs 2019-05-10 22:48:11 +02:00
fpga_manager_gen5.h
freeze_controller.h
gpio.h
handoff_s10.h
mailbox_s10.h arm: socfpga: stratix10: Add macros for mailbox's arguments 2018-12-20 17:12:25 +01:00
misc.h ARM: socfpga: Pull PL310 clearing into common code 2019-05-24 00:01:08 +02:00
nic301.h
pinmux.h
reset_manager.h arm: socfpga: rst: add register definition for cold reset 2019-07-21 12:45:10 +02:00
reset_manager_arria10.h
reset_manager_gen5.h arm: socfpga: remove re-added ad-hoc reset code 2019-05-14 19:52:38 +02:00
reset_manager_s10.h arm: sofcpga: s10: remove unused ad-hoc reset code 2019-05-14 19:52:39 +02:00
scan_manager.h
scu.h
sdram.h
sdram_arria10.h
sdram_gen5.h arm: socfpga: move gen5 SDR driver to DM 2019-04-17 22:20:16 +02:00
system_manager.h
system_manager_arria10.h
system_manager_gen5.h
system_manager_s10.h
timer.h