86 lines
2.0 KiB
ArmAsm
86 lines
2.0 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* 32-bit x86 Startup Code when running from SPL. This is the startup code in
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* U-Boot proper, when SPL is used.
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* Copyright 2018 Google, Inc
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* Written by Simon Glass <sjg@chromium.org>
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*/
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#include <config.h>
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.section .text.start
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.code32
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.globl _start
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.type _start, @function
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_start:
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/*
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* If running from coreboot, CAR is no-longer available. Use the
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* existing stack, which is large enough.
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*/
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call locate_coreboot_table
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cmp $0, %eax
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jge use_existing_stack
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movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %eax
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#ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE
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subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %eax
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#endif
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jmp 2f
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/*
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* We don't subtract CONFIG_DCACHE_RAM_MRC_VAR_SIZE since memory is
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* already set up. This has the happy side-effect of putting gd in a
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* new place separate from SPL, so the memset() in
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* board_init_f_init_reserve() does not cause any problems (otherwise
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* it would zero out the gd and crash)
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*/
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/* Set up memory using the existing stack */
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use_existing_stack:
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mov %esp, %eax
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2:
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call board_init_f_alloc_reserve
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mov %eax, %esp
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call board_init_f_init_reserve
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call x86_cpu_reinit_f
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xorl %eax, %eax
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call board_init_f
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call board_init_f_r
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/* Should not return here */
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jmp .
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.globl board_init_f_r_trampoline
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.type board_init_f_r_trampoline, @function
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board_init_f_r_trampoline:
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/*
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* SPL has been executed and SDRAM has been initialised, U-Boot code
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* has been copied into RAM, BSS has been cleared and relocation
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* adjustments have been made. It is now time to jump into the in-RAM
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* copy of U-Boot
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*
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* %eax = Address of top of new stack
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*/
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/* Stack grows down from top of SDRAM */
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movl %eax, %esp
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/* Re-enter U-Boot by calling board_init_f_r() */
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call board_init_f_r
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die:
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hlt
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jmp die
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hlt
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.align 4
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_dt_ucode_base_size:
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/* These next two fields are filled in by binman */
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.globl ucode_base
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ucode_base: /* Declared in microcode.h */
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.long 0 /* microcode base */
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.globl ucode_size
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ucode_size: /* Declared in microcode.h */
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.long 0 /* microcode size */
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