148 lines
4.5 KiB
C
148 lines
4.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2016 Atmel Corporation
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* Wenyou.Yang <wenyou.yang@atmel.com>
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*/
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#ifndef __AT91_PMC_H__
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#define __AT91_PMC_H__
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#include <linux/bitops.h>
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#include <linux/io.h>
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/* Keep a range of 256 available clocks for every clock type. */
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#define AT91_TO_CLK_ID(_t, _i) (((_t) << 8) | ((_i) & 0xff))
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#define AT91_CLK_ID_TO_DID(_i) ((_i) & 0xff)
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struct clk_range {
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unsigned long min;
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unsigned long max;
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};
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struct clk_master_layout {
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u32 offset;
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u32 mask;
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u8 pres_shift;
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};
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extern const struct clk_master_layout at91rm9200_master_layout;
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extern const struct clk_master_layout at91sam9x5_master_layout;
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struct clk_master_characteristics {
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struct clk_range output;
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u32 divisors[4];
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u8 have_div3_pres;
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};
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struct clk_pll_characteristics {
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struct clk_range input;
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int num_output;
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const struct clk_range *output;
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u16 *icpll;
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u8 *out;
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u8 upll : 1;
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};
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struct clk_pll_layout {
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u32 pllr_mask;
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u32 mul_mask;
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u32 frac_mask;
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u32 div_mask;
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u32 endiv_mask;
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u8 mul_shift;
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u8 frac_shift;
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u8 div_shift;
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u8 endiv_shift;
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};
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struct clk_programmable_layout {
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u8 pres_mask;
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u8 pres_shift;
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u8 css_mask;
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u8 have_slck_mck;
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u8 is_pres_direct;
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};
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struct clk_pcr_layout {
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u32 offset;
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u32 cmd;
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u32 div_mask;
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u32 gckcss_mask;
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u32 pid_mask;
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};
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extern const struct clk_programmable_layout at91rm9200_programmable_layout;
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extern const struct clk_programmable_layout at91sam9g45_programmable_layout;
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extern const struct clk_programmable_layout at91sam9x5_programmable_layout;
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extern const struct clk_ops at91_clk_ops;
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struct clk *at91_clk_main_rc(void __iomem *reg, const char *name,
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const char *parent_name);
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struct clk *at91_clk_main_osc(void __iomem *reg, const char *name,
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const char *parent_name, bool bypass);
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struct clk *at91_clk_rm9200_main(void __iomem *reg, const char *name,
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const char *parent_name);
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struct clk *at91_clk_sam9x5_main(void __iomem *reg, const char *name,
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const char * const *parent_names, int num_parents,
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const u32 *mux_table, int type);
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struct clk *
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sam9x60_clk_register_div_pll(void __iomem *base, const char *name,
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const char *parent_name, u8 id,
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const struct clk_pll_characteristics *characteristics,
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const struct clk_pll_layout *layout, bool critical);
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struct clk *
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sam9x60_clk_register_frac_pll(void __iomem *base, const char *name,
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const char *parent_name, u8 id,
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const struct clk_pll_characteristics *characteristics,
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const struct clk_pll_layout *layout, bool critical);
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struct clk *
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at91_clk_register_master(void __iomem *base, const char *name,
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const char * const *parent_names, int num_parents,
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const struct clk_master_layout *layout,
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const struct clk_master_characteristics *characteristics,
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const u32 *mux_table);
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struct clk *
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at91_clk_sama7g5_register_master(void __iomem *base, const char *name,
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const char * const *parent_names, int num_parents,
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const u32 *mux_table, const u32 *clk_mux_table,
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bool critical, u8 id);
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struct clk *
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at91_clk_register_utmi(void __iomem *base, struct udevice *dev,
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const char *name, const char *parent_name);
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struct clk *
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at91_clk_sama7g5_register_utmi(void __iomem *base, const char *name,
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const char *parent_name);
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struct clk *
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at91_clk_register_programmable(void __iomem *base, const char *name,
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const char * const *parent_names, u8 num_parents, u8 id,
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const struct clk_programmable_layout *layout,
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const u32 *clk_mux_table, const u32 *mux_table);
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struct clk *
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at91_clk_register_system(void __iomem *base, const char *name,
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const char *parent_name, u8 id);
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struct clk *
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at91_clk_register_peripheral(void __iomem *base, const char *name,
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const char *parent_name, u32 id);
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struct clk *
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at91_clk_register_sam9x5_peripheral(void __iomem *base,
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const struct clk_pcr_layout *layout,
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const char *name, const char *parent_name,
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u32 id, const struct clk_range *range);
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struct clk *
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at91_clk_register_generic(void __iomem *base,
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const struct clk_pcr_layout *layout, const char *name,
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const char * const *parent_names,
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const u32 *clk_mux_table, const u32 *mux_table,
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u8 num_parents, u8 id, const struct clk_range *range);
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int at91_clk_mux_val_to_index(const u32 *table, u32 num_parents, u32 val);
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int at91_clk_mux_index_to_val(const u32 *table, u32 num_parents, u32 index);
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void pmc_read(void __iomem *base, unsigned int off, unsigned int *val);
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void pmc_write(void __iomem *base, unsigned int off, unsigned int val);
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void pmc_update_bits(void __iomem *base, unsigned int off, unsigned int mask,
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unsigned int bits);
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#endif
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