168 lines
3.9 KiB
C
168 lines
3.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com>
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*
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* Renesas RCar USB HOST xHCI Controller
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*/
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#include <common.h>
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#include <clk.h>
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#include <dm.h>
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#include <fdtdec.h>
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#include <log.h>
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#include <malloc.h>
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#include <usb.h>
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#include <wait_bit.h>
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#include <dm/device_compat.h>
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#include <linux/bitops.h>
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#include <usb/xhci.h>
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#include "xhci-rcar-r8a779x_usb3_v3.h"
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/* Register Offset */
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#define RCAR_USB3_DL_CTRL 0x250 /* FW Download Control & Status */
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#define RCAR_USB3_FW_DATA0 0x258 /* FW Data0 */
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/* Register Settings */
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/* FW Download Control & Status */
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#define RCAR_USB3_DL_CTRL_ENABLE BIT(0)
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#define RCAR_USB3_DL_CTRL_FW_SUCCESS BIT(4)
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#define RCAR_USB3_DL_CTRL_FW_SET_DATA0 BIT(8)
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struct rcar_xhci_platdata {
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fdt_addr_t hcd_base;
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struct clk clk;
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};
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/**
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* Contains pointers to register base addresses
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* for the usb controller.
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*/
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struct rcar_xhci {
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struct xhci_ctrl ctrl; /* Needs to come first in this struct! */
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struct usb_platdata usb_plat;
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struct xhci_hccr *hcd;
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};
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static int xhci_rcar_download_fw(struct rcar_xhci *ctx, const u32 *fw_data,
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const size_t fw_array_size)
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{
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void __iomem *regs = (void __iomem *)ctx->hcd;
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int i, ret;
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/* Download R-Car USB3.0 firmware */
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setbits_le32(regs + RCAR_USB3_DL_CTRL, RCAR_USB3_DL_CTRL_ENABLE);
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for (i = 0; i < fw_array_size; i++) {
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writel(fw_data[i], regs + RCAR_USB3_FW_DATA0);
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setbits_le32(regs + RCAR_USB3_DL_CTRL,
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RCAR_USB3_DL_CTRL_FW_SET_DATA0);
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ret = wait_for_bit_le32(regs + RCAR_USB3_DL_CTRL,
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RCAR_USB3_DL_CTRL_FW_SET_DATA0, false,
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10, false);
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if (ret)
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break;
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}
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clrbits_le32(regs + RCAR_USB3_DL_CTRL, RCAR_USB3_DL_CTRL_ENABLE);
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ret = wait_for_bit_le32(regs + RCAR_USB3_DL_CTRL,
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RCAR_USB3_DL_CTRL_FW_SUCCESS, true,
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10, false);
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return ret;
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}
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static int xhci_rcar_probe(struct udevice *dev)
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{
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struct rcar_xhci_platdata *plat = dev_get_platdata(dev);
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struct rcar_xhci *ctx = dev_get_priv(dev);
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struct xhci_hcor *hcor;
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int len, ret;
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ret = clk_get_by_index(dev, 0, &plat->clk);
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if (ret < 0) {
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dev_err(dev, "Failed to get USB3 clock\n");
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return ret;
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}
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ret = clk_enable(&plat->clk);
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if (ret) {
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dev_err(dev, "Failed to enable USB3 clock\n");
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goto err_clk;
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}
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ctx->hcd = (struct xhci_hccr *)plat->hcd_base;
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len = HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase));
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hcor = (struct xhci_hcor *)((uintptr_t)ctx->hcd + len);
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ret = xhci_rcar_download_fw(ctx, firmware_r8a779x_usb3_v3,
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ARRAY_SIZE(firmware_r8a779x_usb3_v3));
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if (ret) {
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dev_err(dev, "Failed to download firmware\n");
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goto err_fw;
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}
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ret = xhci_register(dev, ctx->hcd, hcor);
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if (ret) {
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dev_err(dev, "Failed to register xHCI\n");
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goto err_fw;
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}
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return 0;
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err_fw:
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clk_disable(&plat->clk);
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err_clk:
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clk_free(&plat->clk);
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return ret;
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}
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static int xhci_rcar_deregister(struct udevice *dev)
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{
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int ret;
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struct rcar_xhci_platdata *plat = dev_get_platdata(dev);
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ret = xhci_deregister(dev);
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clk_disable(&plat->clk);
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clk_free(&plat->clk);
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return ret;
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}
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static int xhci_rcar_ofdata_to_platdata(struct udevice *dev)
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{
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struct rcar_xhci_platdata *plat = dev_get_platdata(dev);
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plat->hcd_base = dev_read_addr(dev);
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if (plat->hcd_base == FDT_ADDR_T_NONE) {
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debug("Can't get the XHCI register base address\n");
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return -ENXIO;
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}
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return 0;
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}
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static const struct udevice_id xhci_rcar_ids[] = {
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{ .compatible = "renesas,rcar-gen3-xhci" },
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{ .compatible = "renesas,xhci-r8a7795" },
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{ .compatible = "renesas,xhci-r8a7796" },
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{ .compatible = "renesas,xhci-r8a77965" },
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{ }
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};
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U_BOOT_DRIVER(usb_xhci) = {
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.name = "xhci_rcar",
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.id = UCLASS_USB,
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.probe = xhci_rcar_probe,
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.remove = xhci_rcar_deregister,
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.ops = &xhci_usb_ops,
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.of_match = xhci_rcar_ids,
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.ofdata_to_platdata = xhci_rcar_ofdata_to_platdata,
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.platdata_auto_alloc_size = sizeof(struct rcar_xhci_platdata),
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.priv_auto_alloc_size = sizeof(struct rcar_xhci),
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.flags = DM_FLAG_ALLOC_PRIV_DMA,
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};
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