35 lines
		
	
	
		
			1.1 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
			
		
		
	
	
			35 lines
		
	
	
		
			1.1 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
| Soft SPI
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| 
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| The soft SPI bus implementation allows the use of GPIO pins to simulate a
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| SPI bus. No SPI host is required for this to work. The down-side is that the
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| performance will typically be much lower than a real SPI bus.
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| 
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| The soft SPI node requires the following properties:
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| 
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| compatible: "u-boot,soft-spi"
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| soft_spi_cs: GPIO number to use for SPI chip select (output)
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| soft_spi_sclk: GPIO number to use for SPI clock (output)
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| soft_spi_mosi: GPIO number to use for SPI MOSI line (output)
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| soft_spi_miso GPIO number to use for SPI MISO line (input)
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| spi-delay-us: Number of microseconds of delay between each CS transition
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| 
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| The GPIOs should be specified as required by the GPIO controller referenced.
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| The first cell holds the phandle of the controller and the second cell
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| typically holds the GPIO number.
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| 
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| 
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| Example:
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| 
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| 	soft-spi {
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| 		compatible = "u-boot,soft-spi";
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| 		cs-gpio = <&gpio 235 0>;	/* Y43 */
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| 		sclk-gpio = <&gpio 225 0>;	/* Y31 */
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| 		mosi-gpio = <&gpio 227 0>;	/* Y33 */
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| 		miso-gpio = <&gpio 224 0>;	/* Y30 */
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| 		spi-delay-us = <1>;
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| 		#address-cells = <1>;
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| 		#size-cells = <0>;
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| 		cs@0 {
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| 		};
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| 	};
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