347 lines
8.4 KiB
C
347 lines
8.4 KiB
C
/*
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* (C) Copyright 2009, 2011 Freescale Semiconductor, Inc.
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*
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* (C) Copyright 2008, Excito Elektronik i Sk=E5ne AB
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*
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* Author: Tor Krill tor@excito.com
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <pci.h>
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#include <usb.h>
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#include <asm/io.h>
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#include <usb/ehci-fsl.h>
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#include <hwconfig.h>
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#include <fsl_usb.h>
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#include <fdt_support.h>
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#include "ehci.h"
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#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
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#endif
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static void set_txfifothresh(struct usb_ehci *, u32);
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/* Check USB PHY clock valid */
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static int usb_phy_clk_valid(struct usb_ehci *ehci)
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{
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if (!((in_be32(&ehci->control) & PHY_CLK_VALID) ||
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in_be32(&ehci->prictrl))) {
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printf("USB PHY clock invalid!\n");
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return 0;
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} else {
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return 1;
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}
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}
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/*
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* Create the appropriate control structures to manage
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* a new EHCI host controller.
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*
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* Excerpts from linux ehci fsl driver.
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*/
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int ehci_hcd_init(int index, enum usb_init_type init,
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struct ehci_hccr **hccr, struct ehci_hcor **hcor)
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{
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struct usb_ehci *ehci = NULL;
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const char *phy_type = NULL;
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size_t len;
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char current_usb_controller[5];
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#ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
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char usb_phy[5];
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usb_phy[0] = '\0';
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#endif
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if (has_erratum_a007075()) {
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/*
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* A 5ms delay is needed after applying soft-reset to the
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* controller to let external ULPI phy come out of reset.
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* This delay needs to be added before re-initializing
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* the controller after soft-resetting completes
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*/
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mdelay(5);
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}
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memset(current_usb_controller, '\0', 5);
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snprintf(current_usb_controller, 4, "usb%d", index+1);
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switch (index) {
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case 0:
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ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB1_ADDR;
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break;
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case 1:
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ehci = (struct usb_ehci *)CONFIG_SYS_FSL_USB2_ADDR;
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break;
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default:
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printf("ERROR: wrong controller index!!\n");
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break;
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};
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*hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
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*hcor = (struct ehci_hcor *)((uint32_t) *hccr +
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HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
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/* Set to Host mode */
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setbits_le32(&ehci->usbmode, CM_HOST);
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out_be32(&ehci->snoop1, SNOOP_SIZE_2GB);
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out_be32(&ehci->snoop2, 0x80000000 | SNOOP_SIZE_2GB);
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/* Init phy */
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if (hwconfig_sub(current_usb_controller, "phy_type"))
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phy_type = hwconfig_subarg(current_usb_controller,
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"phy_type", &len);
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else
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phy_type = getenv("usb_phy_type");
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if (!phy_type) {
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#ifdef CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
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/* if none specified assume internal UTMI */
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strcpy(usb_phy, "utmi");
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phy_type = usb_phy;
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#else
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printf("WARNING: USB phy type not defined !!\n");
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return -1;
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#endif
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}
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if (!strncmp(phy_type, "utmi", 4)) {
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#if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY)
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clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK,
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PHY_CLK_SEL_UTMI);
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clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK,
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UTMI_PHY_EN);
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udelay(1000); /* delay required for PHY Clk to appear */
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#endif
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out_le32(&(*hcor)->or_portsc[0], PORT_PTS_UTMI);
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clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK,
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USB_EN);
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} else {
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clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK,
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PHY_CLK_SEL_ULPI);
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clrsetbits_be32(&ehci->control, UTMI_PHY_EN |
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CONTROL_REGISTER_W1C_MASK, USB_EN);
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udelay(1000); /* delay required for PHY Clk to appear */
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if (!usb_phy_clk_valid(ehci))
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return -EINVAL;
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out_le32(&(*hcor)->or_portsc[0], PORT_PTS_ULPI);
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}
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out_be32(&ehci->prictrl, 0x0000000c);
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out_be32(&ehci->age_cnt_limit, 0x00000040);
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out_be32(&ehci->sictrl, 0x00000001);
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in_le32(&ehci->usbmode);
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if (has_erratum_a007798())
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set_txfifothresh(ehci, TXFIFOTHRESH);
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return 0;
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}
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/*
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* Destroy the appropriate control structures corresponding
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* the the EHCI host controller.
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*/
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int ehci_hcd_stop(int index)
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{
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return 0;
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}
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/*
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* Setting the value of TXFIFO_THRESH field in TXFILLTUNING register
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* to counter DDR latencies in writing data into Tx buffer.
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* This prevents Tx buffer from getting underrun
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*/
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static void set_txfifothresh(struct usb_ehci *ehci, u32 txfifo_thresh)
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{
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u32 cmd;
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cmd = ehci_readl(&ehci->txfilltuning);
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cmd &= ~TXFIFO_THRESH_MASK;
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cmd |= TXFIFO_THRESH(txfifo_thresh);
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ehci_writel(&ehci->txfilltuning, cmd);
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}
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#if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB)
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static int fdt_fixup_usb_mode_phy_type(void *blob, const char *mode,
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const char *phy_type, int start_offset)
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{
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const char *compat_dr = "fsl-usb2-dr";
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const char *compat_mph = "fsl-usb2-mph";
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const char *prop_mode = "dr_mode";
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const char *prop_type = "phy_type";
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const char *node_type = NULL;
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int node_offset;
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int err;
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node_offset = fdt_node_offset_by_compatible(blob,
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start_offset, compat_mph);
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if (node_offset < 0) {
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node_offset = fdt_node_offset_by_compatible(blob,
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start_offset,
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compat_dr);
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if (node_offset < 0) {
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printf("WARNING: could not find compatible node: %s",
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fdt_strerror(node_offset));
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return -1;
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}
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node_type = compat_dr;
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} else {
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node_type = compat_mph;
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}
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if (mode) {
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err = fdt_setprop(blob, node_offset, prop_mode, mode,
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strlen(mode) + 1);
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if (err < 0)
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printf("WARNING: could not set %s for %s: %s.\n",
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prop_mode, node_type, fdt_strerror(err));
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}
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if (phy_type) {
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err = fdt_setprop(blob, node_offset, prop_type, phy_type,
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strlen(phy_type) + 1);
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if (err < 0)
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printf("WARNING: could not set %s for %s: %s.\n",
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prop_type, node_type, fdt_strerror(err));
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}
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return node_offset;
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}
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static const char *fdt_usb_get_node_type(void *blob, int start_offset,
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int *node_offset)
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{
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const char *compat_dr = "fsl-usb2-dr";
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const char *compat_mph = "fsl-usb2-mph";
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const char *node_type = NULL;
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*node_offset = fdt_node_offset_by_compatible(blob, start_offset,
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compat_mph);
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if (*node_offset < 0) {
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*node_offset = fdt_node_offset_by_compatible(blob,
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start_offset,
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compat_dr);
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if (*node_offset < 0) {
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printf("ERROR: could not find compatible node: %s\n",
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fdt_strerror(*node_offset));
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} else {
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node_type = compat_dr;
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}
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} else {
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node_type = compat_mph;
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}
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return node_type;
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}
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static int fdt_fixup_usb_erratum(void *blob, const char *prop_erratum,
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int start_offset)
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{
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int node_offset, err;
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const char *node_type = NULL;
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node_type = fdt_usb_get_node_type(blob, start_offset, &node_offset);
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if (!node_type)
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return -1;
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err = fdt_setprop(blob, node_offset, prop_erratum, NULL, 0);
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if (err < 0) {
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printf("ERROR: could not set %s for %s: %s.\n",
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prop_erratum, node_type, fdt_strerror(err));
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}
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return node_offset;
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}
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void fdt_fixup_dr_usb(void *blob, bd_t *bd)
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{
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static const char * const modes[] = { "host", "peripheral", "otg" };
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static const char * const phys[] = { "ulpi", "utmi" };
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int usb_erratum_a006261_off = -1;
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int usb_erratum_a007075_off = -1;
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int usb_erratum_a007792_off = -1;
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int usb_mode_off = -1;
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int usb_phy_off = -1;
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char str[5];
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int i, j;
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for (i = 1; i <= CONFIG_USB_MAX_CONTROLLER_COUNT; i++) {
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const char *dr_mode_type = NULL;
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const char *dr_phy_type = NULL;
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int mode_idx = -1, phy_idx = -1;
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snprintf(str, 5, "%s%d", "usb", i);
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if (hwconfig(str)) {
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for (j = 0; j < ARRAY_SIZE(modes); j++) {
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if (hwconfig_subarg_cmp(str, "dr_mode",
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modes[j])) {
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mode_idx = j;
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break;
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}
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}
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for (j = 0; j < ARRAY_SIZE(phys); j++) {
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if (hwconfig_subarg_cmp(str, "phy_type",
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phys[j])) {
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phy_idx = j;
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break;
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}
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}
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if (mode_idx < 0 && phy_idx < 0) {
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printf("WARNING: invalid phy or mode\n");
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return;
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}
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if (mode_idx > -1)
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dr_mode_type = modes[mode_idx];
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if (phy_idx > -1)
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dr_phy_type = phys[phy_idx];
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}
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usb_mode_off = fdt_fixup_usb_mode_phy_type(blob,
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dr_mode_type, NULL,
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usb_mode_off);
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if (usb_mode_off < 0)
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return;
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usb_phy_off = fdt_fixup_usb_mode_phy_type(blob,
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NULL, dr_phy_type,
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usb_phy_off);
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if (usb_phy_off < 0)
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return;
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if (has_erratum_a006261()) {
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usb_erratum_a006261_off = fdt_fixup_usb_erratum
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(blob,
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"fsl,usb-erratum-a006261",
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usb_erratum_a006261_off);
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if (usb_erratum_a006261_off < 0)
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return;
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}
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if (has_erratum_a007075()) {
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usb_erratum_a007075_off = fdt_fixup_usb_erratum
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(blob,
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"fsl,usb-erratum-a007075",
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usb_erratum_a007075_off);
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if (usb_erratum_a007075_off < 0)
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return;
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}
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if (has_erratum_a007792()) {
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usb_erratum_a007792_off = fdt_fixup_usb_erratum
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(blob,
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"fsl,usb-erratum-a007792",
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usb_erratum_a007792_off);
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if (usb_erratum_a007792_off < 0)
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return;
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}
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}
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}
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#endif
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