Kishon Vijay Abraham I 4564faeafb ti: dwc3: Enable clocks in enable_basic_clocks() in hw_data.c ... Commit d3cfcb3 (ARM: DRA7: Enable clocks for USB OTGSS and USB PHY) changed the member names of prcm_regs from cm_l3init_usb_otg_ss_clkctrl to cm_l3init_usb_otg_ss1_clkctrl and from cm_coreaon_usb_phy_core_clkctrl to cm_coreaon_usb_phy1_core_clkctrl in order to differentiate between the two dwc3 controllers present in dra7xx/am43xx and enabled these clocks in enable_basic_clocks() in hw_data.c. However these clocks continued to be enabled in board files/driver files for dwc3 host mode functionality causing compilation break with few configs. Fixed it here by making all the clocks enabled in enable_basic_clocks() and removing it from board files/driver files here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>		2015-04-16 15:08:36 -04:00
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Kconfig	beagle_x15: add board support for Beagle x15	2014-12-04 11:04:39 -05:00
Makefile	armv7: convert makefiles to Kbuild style	2013-10-31 12:53:39 -04:00
abb.c	DRA7: add ABB setup for MPU voltage domain	2014-01-24 11:41:17 -05:00
config.mk	kbuild: use shorten logs for mkimage rules	2014-02-25 11:01:29 -05:00
emif.c	Add GPL-2.0+ SPDX-License-Identifier to source files	2013-07-24 09:44:38 -04:00
hw_data.c	ti: dwc3: Enable clocks in enable_basic_clocks() in hw_data.c	2015-04-16 15:08:36 -04:00
hwinit.c	ARM: OMAP5 / DRA7: Setup L2 Aux Control Register with recommended configuration	2015-03-13 09:29:13 -04:00
prcm-regs.c	ARM: DRA7: Enable clocks for USB OTGSS and USB PHY	2015-04-14 05:48:08 +02:00
sdram.c	ARM: DRA7-evm: DDR3: Update leveling values	2015-02-16 12:41:40 -05:00