123 lines
		
	
	
		
			2.5 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			123 lines
		
	
	
		
			2.5 KiB
		
	
	
	
		
			C
		
	
	
	
| /*
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|  * (C) Copyright 2007
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|  * Stelian Pop <stelian@popies.net>
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|  * Lead Tech Design <www.leadtechdesign.com>
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|  * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| #ifndef __ASM_ARM_ARCH_CLK_H__
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| #define __ASM_ARM_ARCH_CLK_H__
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| 
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| #include <asm/arch/hardware.h>
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| #include <asm/arch/at91_pmc.h>
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| #include <asm/global_data.h>
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| 
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| static inline unsigned long get_cpu_clk_rate(void)
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| {
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| 	DECLARE_GLOBAL_DATA_PTR;
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| 	return gd->arch.cpu_clk_rate_hz;
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| }
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| 
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| static inline unsigned long get_main_clk_rate(void)
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| {
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| 	DECLARE_GLOBAL_DATA_PTR;
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| 	return gd->arch.main_clk_rate_hz;
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| }
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| 
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| static inline unsigned long get_mck_clk_rate(void)
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| {
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| 	DECLARE_GLOBAL_DATA_PTR;
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| 	return gd->arch.mck_rate_hz;
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| }
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| 
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| static inline unsigned long get_plla_clk_rate(void)
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| {
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| 	DECLARE_GLOBAL_DATA_PTR;
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| 	return gd->arch.plla_rate_hz;
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| }
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| 
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| static inline unsigned long get_pllb_clk_rate(void)
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| {
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| 	DECLARE_GLOBAL_DATA_PTR;
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| 	return gd->arch.pllb_rate_hz;
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| }
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| 
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| static inline u32 get_pllb_init(void)
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| {
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| 	DECLARE_GLOBAL_DATA_PTR;
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| 	return gd->arch.at91_pllb_usb_init;
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| }
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| 
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| #ifdef CPU_HAS_H32MXDIV
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| static inline unsigned int get_h32mxdiv(void)
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| {
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| 	struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
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| 
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| 	return readl(&pmc->mckr) & AT91_PMC_MCKR_H32MXDIV;
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| }
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| #else
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| static inline unsigned int get_h32mxdiv(void)
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| {
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| 	return 0;
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| }
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| #endif
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| 
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| static inline unsigned long get_macb_pclk_rate(unsigned int dev_id)
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| {
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| 	if (get_h32mxdiv())
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| 		return get_mck_clk_rate() / 2;
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| 	else
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| 		return get_mck_clk_rate();
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| }
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| 
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| static inline unsigned long get_usart_clk_rate(unsigned int dev_id)
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| {
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| 	if (get_h32mxdiv())
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| 		return get_mck_clk_rate() / 2;
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| 	else
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| 		return get_mck_clk_rate();
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| }
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| 
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| static inline unsigned long get_lcdc_clk_rate(unsigned int dev_id)
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| {
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| 	return get_mck_clk_rate();
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| }
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| 
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| static inline unsigned long get_spi_clk_rate(unsigned int dev_id)
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| {
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| 	if (get_h32mxdiv())
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| 		return get_mck_clk_rate() / 2;
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| 	else
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| 		return get_mck_clk_rate();
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| }
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| 
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| static inline unsigned long get_twi_clk_rate(unsigned int dev_id)
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| {
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| 	if (get_h32mxdiv())
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| 		return get_mck_clk_rate() / 2;
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| 	else
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| 		return get_mck_clk_rate();
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| }
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| 
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| static inline unsigned long get_mci_clk_rate(void)
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| {
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| 	if (get_h32mxdiv())
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| 		return get_mck_clk_rate() / 2;
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| 	else
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| 		return get_mck_clk_rate();
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| }
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| 
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| static inline unsigned long get_pit_clk_rate(void)
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| {
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| 	if (get_h32mxdiv())
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| 		return get_mck_clk_rate() / 2;
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| 	else
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| 		return get_mck_clk_rate();
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| }
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| 
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| int at91_clock_init(unsigned long main_clock);
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| void at91_periph_clk_enable(int id);
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| void at91_periph_clk_disable(int id);
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| #endif /* __ASM_ARM_ARCH_CLK_H__ */
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