Alexey Brodkin db6ce2312d arc: cache - utilize IO coherency (AKA IOC) engine ... With release of ARC HS38 v2.1 new IO coherency engine could be built-in ARC core. This hardware module ensures coherency between DMA-ed data from peripherals and L2 cache. With L2 and IOC enabled there's no overhead for L2 cache manual maintenance which results in significantly improved IO bandwidth. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>		2016-02-20 11:20:05 +03:00
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asm	arc: cache - utilize IO coherency (AKA IOC) engine	2016-02-20 11:20:05 +03:00