113 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			113 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
| /*
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|  * Copyright (C) 2015 Google, Inc
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|  * Written by Simon Glass <sjg@chromium.org>
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| 
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| #include <common.h>
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| #include <clk.h>
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| #include <dm.h>
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| #include <errno.h>
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| #include <dm/lists.h>
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| #include <dm/root.h>
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| 
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| DECLARE_GLOBAL_DATA_PTR;
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| 
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| ulong clk_get_rate(struct udevice *dev)
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| {
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| 	struct clk_ops *ops = clk_get_ops(dev);
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| 
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| 	if (!ops->get_rate)
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| 		return -ENOSYS;
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| 
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| 	return ops->get_rate(dev);
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| }
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| 
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| ulong clk_set_rate(struct udevice *dev, ulong rate)
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| {
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| 	struct clk_ops *ops = clk_get_ops(dev);
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| 
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| 	if (!ops->set_rate)
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| 		return -ENOSYS;
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| 
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| 	return ops->set_rate(dev, rate);
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| }
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| 
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| int clk_enable(struct udevice *dev, int periph)
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| {
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| 	struct clk_ops *ops = clk_get_ops(dev);
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| 
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| 	if (!ops->enable)
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| 		return -ENOSYS;
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| 
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| 	return ops->enable(dev, periph);
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| }
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| 
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| ulong clk_get_periph_rate(struct udevice *dev, int periph)
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| {
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| 	struct clk_ops *ops = clk_get_ops(dev);
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| 
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| 	if (!ops->get_periph_rate)
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| 		return -ENOSYS;
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| 
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| 	return ops->get_periph_rate(dev, periph);
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| }
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| 
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| ulong clk_set_periph_rate(struct udevice *dev, int periph, ulong rate)
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| {
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| 	struct clk_ops *ops = clk_get_ops(dev);
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| 
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| 	if (!ops->set_periph_rate)
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| 		return -ENOSYS;
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| 
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| 	return ops->set_periph_rate(dev, periph, rate);
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| }
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| 
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| #if CONFIG_IS_ENABLED(OF_CONTROL)
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| int clk_get_by_index(struct udevice *dev, int index, struct udevice **clk_devp)
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| {
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| 	int ret;
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| #ifdef CONFIG_SPL_BUILD
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| 	u32 cell[2];
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| 
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| 	if (index != 0)
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| 		return -ENOSYS;
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| 	assert(*clk_devp);
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| 	ret = uclass_get_device(UCLASS_CLK, 0, clk_devp);
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| 	if (ret)
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| 		return ret;
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| 	ret = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset, "clocks",
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| 				   cell, 2);
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| 	if (ret)
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| 		return ret;
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| 	return cell[1];
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| #else
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| 	struct fdtdec_phandle_args args;
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| 
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| 	assert(*clk_devp);
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| 	ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev->of_offset,
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| 					     "clocks", "#clock-cells", 0, index,
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| 					     &args);
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| 	if (ret) {
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| 		debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
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| 		      __func__, ret);
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| 		return ret;
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| 	}
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| 
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| 	ret = uclass_get_device_by_of_offset(UCLASS_CLK, args.node, clk_devp);
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| 	if (ret) {
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| 		debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
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| 		      __func__, ret);
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| 		return ret;
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| 	}
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| 	return args.args_count > 0 ? args.args[0] : 0;
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| #endif
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| }
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| #endif
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| 
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| UCLASS_DRIVER(clk) = {
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| 	.id		= UCLASS_CLK,
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| 	.name		= "clk",
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| };
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