381 lines
15 KiB
C
381 lines
15 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Driver for the NXP ISP1760 chip
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*
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* Copyright 2022 Linaro, Rui Miguel Silva <rui.silva@linaro.org>
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*
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* This is based on linux kernel driver, original developed:
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* Copyright 2014 Laurent Pinchart
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* Copyright 2007 Sebastian Siewior
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*
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*/
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#include <dm.h>
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#include <dm/device-internal.h>
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#include <dm/device_compat.h>
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#include <dm/devres.h>
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#include <linux/compat.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <regmap.h>
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#include <usb.h>
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#include "isp1760-core.h"
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#include "isp1760-hcd.h"
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#include "isp1760-regs.h"
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#define msleep(a) udelay((a) * 1000)
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static int isp1760_init_core(struct isp1760_device *isp)
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{
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struct isp1760_hcd *hcd = &isp->hcd;
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/*
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* Reset the host controller, including the CPU interface
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* configuration.
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*/
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isp1760_field_set(hcd->fields, SW_RESET_RESET_ALL);
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msleep(100);
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/* Setup HW Mode Control: This assumes a level active-low interrupt */
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if ((isp->devflags & ISP1760_FLAG_ANALOG_OC) && hcd->is_isp1763)
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return -EINVAL;
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if (isp->devflags & ISP1760_FLAG_BUS_WIDTH_16)
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isp1760_field_clear(hcd->fields, HW_DATA_BUS_WIDTH);
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if (isp->devflags & ISP1760_FLAG_BUS_WIDTH_8)
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isp1760_field_set(hcd->fields, HW_DATA_BUS_WIDTH);
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if (isp->devflags & ISP1760_FLAG_ANALOG_OC)
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isp1760_field_set(hcd->fields, HW_ANA_DIGI_OC);
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if (isp->devflags & ISP1760_FLAG_DACK_POL_HIGH)
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isp1760_field_set(hcd->fields, HW_DACK_POL_HIGH);
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if (isp->devflags & ISP1760_FLAG_DREQ_POL_HIGH)
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isp1760_field_set(hcd->fields, HW_DREQ_POL_HIGH);
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if (isp->devflags & ISP1760_FLAG_INTR_POL_HIGH)
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isp1760_field_set(hcd->fields, HW_INTR_HIGH_ACT);
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if (isp->devflags & ISP1760_FLAG_INTR_EDGE_TRIG)
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isp1760_field_set(hcd->fields, HW_INTR_EDGE_TRIG);
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/*
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* The ISP1761 has a dedicated DC IRQ line but supports sharing the HC
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* IRQ line for both the host and device controllers. Hardcode IRQ
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* sharing for now and disable the DC interrupts globally to avoid
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* spurious interrupts during HCD registration.
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*/
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if (isp->devflags & ISP1760_FLAG_ISP1761) {
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isp1760_reg_write(hcd->regs, ISP176x_DC_MODE, 0);
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isp1760_field_set(hcd->fields, HW_COMN_IRQ);
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}
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/*
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* PORT 1 Control register of the ISP1760 is the OTG control register
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* on ISP1761.
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*
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* TODO: Really support OTG. For now we configure port 1 in device mode
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*/
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if (((isp->devflags & ISP1760_FLAG_ISP1761) ||
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(isp->devflags & ISP1760_FLAG_ISP1763)) &&
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(isp->devflags & ISP1760_FLAG_PERIPHERAL_EN)) {
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isp1760_field_set(hcd->fields, HW_DM_PULLDOWN);
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isp1760_field_set(hcd->fields, HW_DP_PULLDOWN);
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isp1760_field_set(hcd->fields, HW_OTG_DISABLE);
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} else {
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isp1760_field_set(hcd->fields, HW_SW_SEL_HC_DC);
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isp1760_field_set(hcd->fields, HW_VBUS_DRV);
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isp1760_field_set(hcd->fields, HW_SEL_CP_EXT);
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}
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printf("%s bus width: %u, oc: %s\n",
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hcd->is_isp1763 ? "isp1763" : "isp1760",
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isp->devflags & ISP1760_FLAG_BUS_WIDTH_8 ? 8 :
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isp->devflags & ISP1760_FLAG_BUS_WIDTH_16 ? 16 : 32,
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hcd->is_isp1763 ? "not available" :
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isp->devflags & ISP1760_FLAG_ANALOG_OC ? "analog" : "digital");
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return 0;
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}
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void isp1760_set_pullup(struct isp1760_device *isp, bool enable)
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{
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struct isp1760_hcd *hcd = &isp->hcd;
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if (enable)
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isp1760_field_set(hcd->fields, HW_DP_PULLUP);
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else
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isp1760_field_set(hcd->fields, HW_DP_PULLUP_CLEAR);
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}
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/*
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* ISP1760/61:
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*
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* 60kb divided in:
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* - 32 blocks @ 256 bytes
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* - 20 blocks @ 1024 bytes
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* - 4 blocks @ 8192 bytes
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*/
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static const struct isp1760_memory_layout isp176x_memory_conf = {
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.blocks[0] = 32,
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.blocks_size[0] = 256,
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.blocks[1] = 20,
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.blocks_size[1] = 1024,
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.blocks[2] = 4,
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.blocks_size[2] = 8192,
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.slot_num = 32,
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.payload_blocks = 32 + 20 + 4,
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.payload_area_size = 0xf000,
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};
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/*
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* ISP1763:
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*
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* 20kb divided in:
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* - 8 blocks @ 256 bytes
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* - 2 blocks @ 1024 bytes
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* - 4 blocks @ 4096 bytes
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*/
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static const struct isp1760_memory_layout isp1763_memory_conf = {
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.blocks[0] = 8,
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.blocks_size[0] = 256,
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.blocks[1] = 2,
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.blocks_size[1] = 1024,
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.blocks[2] = 4,
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.blocks_size[2] = 4096,
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.slot_num = 16,
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.payload_blocks = 8 + 2 + 4,
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.payload_area_size = 0x5000,
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};
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static const struct regmap_config isp1760_hc_regmap_conf = {
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.width = REGMAP_SIZE_16,
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};
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static const struct reg_field isp1760_hc_reg_fields[] = {
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[HCS_PPC] = REG_FIELD(ISP176x_HC_HCSPARAMS, 4, 4),
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[HCS_N_PORTS] = REG_FIELD(ISP176x_HC_HCSPARAMS, 0, 3),
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[HCC_ISOC_CACHE] = REG_FIELD(ISP176x_HC_HCCPARAMS, 7, 7),
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[HCC_ISOC_THRES] = REG_FIELD(ISP176x_HC_HCCPARAMS, 4, 6),
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[CMD_LRESET] = REG_FIELD(ISP176x_HC_USBCMD, 7, 7),
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[CMD_RESET] = REG_FIELD(ISP176x_HC_USBCMD, 1, 1),
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[CMD_RUN] = REG_FIELD(ISP176x_HC_USBCMD, 0, 0),
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[STS_PCD] = REG_FIELD(ISP176x_HC_USBSTS, 2, 2),
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[HC_FRINDEX] = REG_FIELD(ISP176x_HC_FRINDEX, 0, 13),
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[FLAG_CF] = REG_FIELD(ISP176x_HC_CONFIGFLAG, 0, 0),
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[HC_ISO_PTD_DONEMAP] = REG_FIELD(ISP176x_HC_ISO_PTD_DONEMAP, 0, 31),
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[HC_ISO_PTD_SKIPMAP] = REG_FIELD(ISP176x_HC_ISO_PTD_SKIPMAP, 0, 31),
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[HC_ISO_PTD_LASTPTD] = REG_FIELD(ISP176x_HC_ISO_PTD_LASTPTD, 0, 31),
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[HC_INT_PTD_DONEMAP] = REG_FIELD(ISP176x_HC_INT_PTD_DONEMAP, 0, 31),
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[HC_INT_PTD_SKIPMAP] = REG_FIELD(ISP176x_HC_INT_PTD_SKIPMAP, 0, 31),
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[HC_INT_PTD_LASTPTD] = REG_FIELD(ISP176x_HC_INT_PTD_LASTPTD, 0, 31),
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[HC_ATL_PTD_DONEMAP] = REG_FIELD(ISP176x_HC_ATL_PTD_DONEMAP, 0, 31),
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[HC_ATL_PTD_SKIPMAP] = REG_FIELD(ISP176x_HC_ATL_PTD_SKIPMAP, 0, 31),
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[HC_ATL_PTD_LASTPTD] = REG_FIELD(ISP176x_HC_ATL_PTD_LASTPTD, 0, 31),
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[PORT_OWNER] = REG_FIELD(ISP176x_HC_PORTSC1, 13, 13),
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[PORT_POWER] = REG_FIELD(ISP176x_HC_PORTSC1, 12, 12),
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[PORT_LSTATUS] = REG_FIELD(ISP176x_HC_PORTSC1, 10, 11),
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[PORT_RESET] = REG_FIELD(ISP176x_HC_PORTSC1, 8, 8),
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[PORT_SUSPEND] = REG_FIELD(ISP176x_HC_PORTSC1, 7, 7),
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[PORT_RESUME] = REG_FIELD(ISP176x_HC_PORTSC1, 6, 6),
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[PORT_PE] = REG_FIELD(ISP176x_HC_PORTSC1, 2, 2),
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[PORT_CSC] = REG_FIELD(ISP176x_HC_PORTSC1, 1, 1),
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[PORT_CONNECT] = REG_FIELD(ISP176x_HC_PORTSC1, 0, 0),
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[ALL_ATX_RESET] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 31, 31),
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[HW_ANA_DIGI_OC] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 15, 15),
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[HW_COMN_IRQ] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 10, 10),
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[HW_DATA_BUS_WIDTH] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 8, 8),
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[HW_DACK_POL_HIGH] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 6, 6),
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[HW_DREQ_POL_HIGH] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 5, 5),
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[HW_INTR_HIGH_ACT] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 2, 2),
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[HW_INTR_EDGE_TRIG] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 1, 1),
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[HW_GLOBAL_INTR_EN] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 0, 0),
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[HC_CHIP_REV] = REG_FIELD(ISP176x_HC_CHIP_ID, 16, 31),
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[HC_CHIP_ID_HIGH] = REG_FIELD(ISP176x_HC_CHIP_ID, 8, 15),
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[HC_CHIP_ID_LOW] = REG_FIELD(ISP176x_HC_CHIP_ID, 0, 7),
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[HC_SCRATCH] = REG_FIELD(ISP176x_HC_SCRATCH, 0, 31),
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[SW_RESET_RESET_ALL] = REG_FIELD(ISP176x_HC_RESET, 0, 0),
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[ISO_BUF_FILL] = REG_FIELD(ISP176x_HC_BUFFER_STATUS, 2, 2),
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[INT_BUF_FILL] = REG_FIELD(ISP176x_HC_BUFFER_STATUS, 1, 1),
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[ATL_BUF_FILL] = REG_FIELD(ISP176x_HC_BUFFER_STATUS, 0, 0),
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[MEM_BANK_SEL] = REG_FIELD(ISP176x_HC_MEMORY, 16, 17),
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[MEM_START_ADDR] = REG_FIELD(ISP176x_HC_MEMORY, 0, 15),
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[HC_INTERRUPT] = REG_FIELD(ISP176x_HC_INTERRUPT, 0, 9),
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[HC_ATL_IRQ_ENABLE] = REG_FIELD(ISP176x_HC_INTERRUPT_ENABLE, 8, 8),
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[HC_INT_IRQ_ENABLE] = REG_FIELD(ISP176x_HC_INTERRUPT_ENABLE, 7, 7),
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[HC_ISO_IRQ_MASK_OR] = REG_FIELD(ISP176x_HC_ISO_IRQ_MASK_OR, 0, 31),
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[HC_INT_IRQ_MASK_OR] = REG_FIELD(ISP176x_HC_INT_IRQ_MASK_OR, 0, 31),
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[HC_ATL_IRQ_MASK_OR] = REG_FIELD(ISP176x_HC_ATL_IRQ_MASK_OR, 0, 31),
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[HC_ISO_IRQ_MASK_AND] = REG_FIELD(ISP176x_HC_ISO_IRQ_MASK_AND, 0, 31),
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[HC_INT_IRQ_MASK_AND] = REG_FIELD(ISP176x_HC_INT_IRQ_MASK_AND, 0, 31),
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[HC_ATL_IRQ_MASK_AND] = REG_FIELD(ISP176x_HC_ATL_IRQ_MASK_AND, 0, 31),
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[HW_OTG_DISABLE] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 10, 10),
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[HW_SW_SEL_HC_DC] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 7, 7),
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[HW_VBUS_DRV] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 4, 4),
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[HW_SEL_CP_EXT] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 3, 3),
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[HW_DM_PULLDOWN] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 2, 2),
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[HW_DP_PULLDOWN] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 1, 1),
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[HW_DP_PULLUP] = REG_FIELD(ISP176x_HC_OTG_CTRL_SET, 0, 0),
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[HW_OTG_DISABLE_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 10, 10),
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[HW_SW_SEL_HC_DC_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 7, 7),
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[HW_VBUS_DRV_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 4, 4),
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[HW_SEL_CP_EXT_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 3, 3),
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[HW_DM_PULLDOWN_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 2, 2),
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[HW_DP_PULLDOWN_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 1, 1),
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[HW_DP_PULLUP_CLEAR] = REG_FIELD(ISP176x_HC_OTG_CTRL_CLEAR, 0, 0),
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/* Make sure the array is sized properly during compilation */
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[HC_FIELD_MAX] = {},
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};
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static const struct regmap_config isp1763_hc_regmap_conf = {
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.width = REGMAP_SIZE_16,
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};
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static const struct reg_field isp1763_hc_reg_fields[] = {
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[CMD_LRESET] = REG_FIELD(ISP1763_HC_USBCMD, 7, 7),
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[CMD_RESET] = REG_FIELD(ISP1763_HC_USBCMD, 1, 1),
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[CMD_RUN] = REG_FIELD(ISP1763_HC_USBCMD, 0, 0),
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[STS_PCD] = REG_FIELD(ISP1763_HC_USBSTS, 2, 2),
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[HC_FRINDEX] = REG_FIELD(ISP1763_HC_FRINDEX, 0, 13),
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[FLAG_CF] = REG_FIELD(ISP1763_HC_CONFIGFLAG, 0, 0),
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[HC_ISO_PTD_DONEMAP] = REG_FIELD(ISP1763_HC_ISO_PTD_DONEMAP, 0, 15),
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[HC_ISO_PTD_SKIPMAP] = REG_FIELD(ISP1763_HC_ISO_PTD_SKIPMAP, 0, 15),
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[HC_ISO_PTD_LASTPTD] = REG_FIELD(ISP1763_HC_ISO_PTD_LASTPTD, 0, 15),
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[HC_INT_PTD_DONEMAP] = REG_FIELD(ISP1763_HC_INT_PTD_DONEMAP, 0, 15),
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[HC_INT_PTD_SKIPMAP] = REG_FIELD(ISP1763_HC_INT_PTD_SKIPMAP, 0, 15),
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[HC_INT_PTD_LASTPTD] = REG_FIELD(ISP1763_HC_INT_PTD_LASTPTD, 0, 15),
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[HC_ATL_PTD_DONEMAP] = REG_FIELD(ISP1763_HC_ATL_PTD_DONEMAP, 0, 15),
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[HC_ATL_PTD_SKIPMAP] = REG_FIELD(ISP1763_HC_ATL_PTD_SKIPMAP, 0, 15),
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[HC_ATL_PTD_LASTPTD] = REG_FIELD(ISP1763_HC_ATL_PTD_LASTPTD, 0, 15),
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[PORT_OWNER] = REG_FIELD(ISP1763_HC_PORTSC1, 13, 13),
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[PORT_POWER] = REG_FIELD(ISP1763_HC_PORTSC1, 12, 12),
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[PORT_LSTATUS] = REG_FIELD(ISP1763_HC_PORTSC1, 10, 11),
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[PORT_RESET] = REG_FIELD(ISP1763_HC_PORTSC1, 8, 8),
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[PORT_SUSPEND] = REG_FIELD(ISP1763_HC_PORTSC1, 7, 7),
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[PORT_RESUME] = REG_FIELD(ISP1763_HC_PORTSC1, 6, 6),
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[PORT_PE] = REG_FIELD(ISP1763_HC_PORTSC1, 2, 2),
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[PORT_CSC] = REG_FIELD(ISP1763_HC_PORTSC1, 1, 1),
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[PORT_CONNECT] = REG_FIELD(ISP1763_HC_PORTSC1, 0, 0),
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[HW_DATA_BUS_WIDTH] = REG_FIELD(ISP1763_HC_HW_MODE_CTRL, 4, 4),
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[HW_DACK_POL_HIGH] = REG_FIELD(ISP1763_HC_HW_MODE_CTRL, 6, 6),
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[HW_DREQ_POL_HIGH] = REG_FIELD(ISP1763_HC_HW_MODE_CTRL, 5, 5),
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[HW_INTF_LOCK] = REG_FIELD(ISP1763_HC_HW_MODE_CTRL, 3, 3),
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[HW_INTR_HIGH_ACT] = REG_FIELD(ISP1763_HC_HW_MODE_CTRL, 2, 2),
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[HW_INTR_EDGE_TRIG] = REG_FIELD(ISP1763_HC_HW_MODE_CTRL, 1, 1),
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[HW_GLOBAL_INTR_EN] = REG_FIELD(ISP1763_HC_HW_MODE_CTRL, 0, 0),
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[SW_RESET_RESET_ATX] = REG_FIELD(ISP1763_HC_RESET, 3, 3),
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[SW_RESET_RESET_ALL] = REG_FIELD(ISP1763_HC_RESET, 0, 0),
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[HC_CHIP_ID_HIGH] = REG_FIELD(ISP1763_HC_CHIP_ID, 0, 15),
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[HC_CHIP_ID_LOW] = REG_FIELD(ISP1763_HC_CHIP_REV, 8, 15),
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[HC_CHIP_REV] = REG_FIELD(ISP1763_HC_CHIP_REV, 0, 7),
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[HC_SCRATCH] = REG_FIELD(ISP1763_HC_SCRATCH, 0, 15),
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[ISO_BUF_FILL] = REG_FIELD(ISP1763_HC_BUFFER_STATUS, 2, 2),
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[INT_BUF_FILL] = REG_FIELD(ISP1763_HC_BUFFER_STATUS, 1, 1),
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[ATL_BUF_FILL] = REG_FIELD(ISP1763_HC_BUFFER_STATUS, 0, 0),
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[MEM_START_ADDR] = REG_FIELD(ISP1763_HC_MEMORY, 0, 15),
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[HC_DATA] = REG_FIELD(ISP1763_HC_DATA, 0, 15),
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[HC_INTERRUPT] = REG_FIELD(ISP1763_HC_INTERRUPT, 0, 10),
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[HC_ATL_IRQ_ENABLE] = REG_FIELD(ISP1763_HC_INTERRUPT_ENABLE, 8, 8),
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[HC_INT_IRQ_ENABLE] = REG_FIELD(ISP1763_HC_INTERRUPT_ENABLE, 7, 7),
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[HC_ISO_IRQ_MASK_OR] = REG_FIELD(ISP1763_HC_ISO_IRQ_MASK_OR, 0, 15),
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[HC_INT_IRQ_MASK_OR] = REG_FIELD(ISP1763_HC_INT_IRQ_MASK_OR, 0, 15),
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[HC_ATL_IRQ_MASK_OR] = REG_FIELD(ISP1763_HC_ATL_IRQ_MASK_OR, 0, 15),
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[HC_ISO_IRQ_MASK_AND] = REG_FIELD(ISP1763_HC_ISO_IRQ_MASK_AND, 0, 15),
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[HC_INT_IRQ_MASK_AND] = REG_FIELD(ISP1763_HC_INT_IRQ_MASK_AND, 0, 15),
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[HC_ATL_IRQ_MASK_AND] = REG_FIELD(ISP1763_HC_ATL_IRQ_MASK_AND, 0, 15),
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[HW_HC_2_DIS] = REG_FIELD(ISP1763_HC_OTG_CTRL_SET, 15, 15),
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[HW_OTG_DISABLE] = REG_FIELD(ISP1763_HC_OTG_CTRL_SET, 10, 10),
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[HW_SW_SEL_HC_DC] = REG_FIELD(ISP1763_HC_OTG_CTRL_SET, 7, 7),
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[HW_VBUS_DRV] = REG_FIELD(ISP1763_HC_OTG_CTRL_SET, 4, 4),
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[HW_SEL_CP_EXT] = REG_FIELD(ISP1763_HC_OTG_CTRL_SET, 3, 3),
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[HW_DM_PULLDOWN] = REG_FIELD(ISP1763_HC_OTG_CTRL_SET, 2, 2),
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[HW_DP_PULLDOWN] = REG_FIELD(ISP1763_HC_OTG_CTRL_SET, 1, 1),
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[HW_DP_PULLUP] = REG_FIELD(ISP1763_HC_OTG_CTRL_SET, 0, 0),
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[HW_HC_2_DIS_CLEAR] = REG_FIELD(ISP1763_HC_OTG_CTRL_CLEAR, 15, 15),
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[HW_OTG_DISABLE_CLEAR] = REG_FIELD(ISP1763_HC_OTG_CTRL_CLEAR, 10, 10),
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[HW_SW_SEL_HC_DC_CLEAR] = REG_FIELD(ISP1763_HC_OTG_CTRL_CLEAR, 7, 7),
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[HW_VBUS_DRV_CLEAR] = REG_FIELD(ISP1763_HC_OTG_CTRL_CLEAR, 4, 4),
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[HW_SEL_CP_EXT_CLEAR] = REG_FIELD(ISP1763_HC_OTG_CTRL_CLEAR, 3, 3),
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[HW_DM_PULLDOWN_CLEAR] = REG_FIELD(ISP1763_HC_OTG_CTRL_CLEAR, 2, 2),
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[HW_DP_PULLDOWN_CLEAR] = REG_FIELD(ISP1763_HC_OTG_CTRL_CLEAR, 1, 1),
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[HW_DP_PULLUP_CLEAR] = REG_FIELD(ISP1763_HC_OTG_CTRL_CLEAR, 0, 0),
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/* Make sure the array is sized properly during compilation */
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[HC_FIELD_MAX] = {},
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|
};
|
|
|
|
int isp1760_register(struct isp1760_device *isp, struct resource *mem, int irq,
|
|
unsigned long irqflags)
|
|
{
|
|
const struct regmap_config *hc_regmap;
|
|
const struct reg_field *hc_reg_fields;
|
|
struct isp1760_hcd *hcd;
|
|
struct regmap_field *f;
|
|
unsigned int devflags;
|
|
struct udevice *dev;
|
|
int ret;
|
|
int i;
|
|
|
|
hcd = &isp->hcd;
|
|
devflags = isp->devflags;
|
|
dev = isp->dev;
|
|
|
|
hcd->is_isp1763 = !!(devflags & ISP1760_FLAG_ISP1763);
|
|
|
|
if (!hcd->is_isp1763 && (devflags & ISP1760_FLAG_BUS_WIDTH_8)) {
|
|
dev_err(dev, "isp1760/61 do not support data width 8\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (hcd->is_isp1763) {
|
|
hc_regmap = &isp1763_hc_regmap_conf;
|
|
hc_reg_fields = &isp1763_hc_reg_fields[0];
|
|
} else {
|
|
hc_regmap = &isp1760_hc_regmap_conf;
|
|
hc_reg_fields = &isp1760_hc_reg_fields[0];
|
|
}
|
|
|
|
hcd->base = devm_ioremap(dev, mem->start, resource_size(mem));
|
|
if (IS_ERR(hcd->base))
|
|
return PTR_ERR(hcd->base);
|
|
|
|
hcd->regs = devm_regmap_init(dev, NULL, NULL, hc_regmap);
|
|
if (IS_ERR(hcd->regs))
|
|
return PTR_ERR(hcd->regs);
|
|
|
|
for (i = 0; i < HC_FIELD_MAX; i++) {
|
|
f = devm_regmap_field_alloc(dev, hcd->regs, hc_reg_fields[i]);
|
|
if (IS_ERR(f))
|
|
return PTR_ERR(f);
|
|
|
|
hcd->fields[i] = f;
|
|
}
|
|
|
|
if (hcd->is_isp1763)
|
|
hcd->memory_layout = &isp1763_memory_conf;
|
|
else
|
|
hcd->memory_layout = &isp176x_memory_conf;
|
|
|
|
ret = isp1760_init_core(isp);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
hcd->dev = dev;
|
|
|
|
ret = isp1760_hcd_register(hcd, mem, irq, irqflags, dev);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = isp1760_hcd_lowlevel_init(hcd);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
dev_set_drvdata(dev, isp);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void isp1760_unregister(struct isp1760_device *isp)
|
|
{
|
|
isp1760_hcd_unregister(&isp->hcd);
|
|
}
|