127 lines
3.2 KiB
C
127 lines
3.2 KiB
C
/*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian@popies.net>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/at91_common.h>
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#include <asm/arch/clk.h>
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#include <asm/arch/gpio.h>
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/*
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* if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
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* peripheral pins. Good to have if hardware is soldered optionally
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* or in case of SPI no slave is selected. Avoid lines to float
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* needlessly. Use a short local PUP define.
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*
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* Due to errata "TXD floats when CTS is inactive" pullups are always
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* on for TXD pins.
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*/
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#ifdef CONFIG_AT91_GPIO_PULLUP
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# define PUP CONFIG_AT91_GPIO_PULLUP
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#else
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# define PUP 0
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#endif
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void at91_serial0_hw_init(void)
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{
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at91_set_a_periph(AT91_PIO_PORTC, 8, 1); /* TXD0 */
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at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* RXD0 */
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at91_periph_clk_enable(ATMEL_ID_USART0);
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}
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void at91_serial1_hw_init(void)
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{
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at91_set_a_periph(AT91_PIO_PORTC, 12, 1); /* TXD1 */
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at91_set_a_periph(AT91_PIO_PORTC, 13, 0); /* RXD1 */
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at91_periph_clk_enable(ATMEL_ID_USART1);
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}
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void at91_serial2_hw_init(void)
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{
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at91_set_a_periph(AT91_PIO_PORTC, 14, 1); /* TXD2 */
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at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* RXD2 */
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at91_periph_clk_enable(ATMEL_ID_USART2);
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}
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void at91_seriald_hw_init(void)
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{
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at91_set_a_periph(AT91_PIO_PORTA, 9, 0); /* DRXD */
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at91_set_a_periph(AT91_PIO_PORTA, 10, 1); /* DTXD */
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at91_periph_clk_enable(ATMEL_ID_SYS);
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}
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#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
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void at91_spi0_hw_init(unsigned long cs_mask)
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{
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at91_set_a_periph(AT91_PIO_PORTA, 0, PUP); /* SPI0_MISO */
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at91_set_a_periph(AT91_PIO_PORTA, 1, PUP); /* SPI0_MOSI */
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at91_set_a_periph(AT91_PIO_PORTA, 2, PUP); /* SPI0_SPCK */
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at91_periph_clk_enable(ATMEL_ID_SPI0);
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if (cs_mask & (1 << 0)) {
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at91_set_a_periph(AT91_PIO_PORTA, 3, 1);
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}
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if (cs_mask & (1 << 1)) {
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at91_set_a_periph(AT91_PIO_PORTA, 4, 1);
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}
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if (cs_mask & (1 << 2)) {
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at91_set_a_periph(AT91_PIO_PORTA, 5, 1);
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}
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if (cs_mask & (1 << 3)) {
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at91_set_a_periph(AT91_PIO_PORTA, 6, 1);
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}
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if (cs_mask & (1 << 4)) {
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at91_set_pio_output(AT91_PIO_PORTA, 3, 1);
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}
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if (cs_mask & (1 << 5)) {
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at91_set_pio_output(AT91_PIO_PORTA, 4, 1);
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}
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if (cs_mask & (1 << 6)) {
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at91_set_pio_output(AT91_PIO_PORTA, 5, 1);
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}
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if (cs_mask & (1 << 7)) {
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at91_set_pio_output(AT91_PIO_PORTA, 6, 1);
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}
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}
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void at91_spi1_hw_init(unsigned long cs_mask)
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{
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at91_set_a_periph(AT91_PIO_PORTB, 30, PUP); /* SPI1_MISO */
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at91_set_a_periph(AT91_PIO_PORTB, 31, PUP); /* SPI1_MOSI */
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at91_set_a_periph(AT91_PIO_PORTB, 29, PUP); /* SPI1_SPCK */
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at91_periph_clk_enable(ATMEL_ID_SPI1);
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if (cs_mask & (1 << 0)) {
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at91_set_a_periph(AT91_PIO_PORTB, 28, 1);
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}
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if (cs_mask & (1 << 1)) {
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at91_set_b_periph(AT91_PIO_PORTA, 24, 1);
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}
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if (cs_mask & (1 << 2)) {
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at91_set_b_periph(AT91_PIO_PORTA, 25, 1);
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}
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if (cs_mask & (1 << 3)) {
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at91_set_a_periph(AT91_PIO_PORTA, 26, 1);
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}
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if (cs_mask & (1 << 4)) {
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at91_set_pio_output(AT91_PIO_PORTB, 28, 1);
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}
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if (cs_mask & (1 << 5)) {
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at91_set_pio_output(AT91_PIO_PORTA, 24, 1);
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}
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if (cs_mask & (1 << 6)) {
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at91_set_pio_output(AT91_PIO_PORTA, 25, 1);
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}
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if (cs_mask & (1 << 7)) {
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at91_set_pio_output(AT91_PIO_PORTA, 26, 1);
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}
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}
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#endif
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