65 lines
		
	
	
		
			1.6 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			65 lines
		
	
	
		
			1.6 KiB
		
	
	
	
		
			C
		
	
	
	
| /* SPDX-License-Identifier: GPL-2.0 */
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| /*
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|  * Copyright (c) 2016 Google, Inc
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|  */
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| 
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| #ifndef __ASM_CPU_COMMON_H
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| #define __ASM_CPU_COMMON_H
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| 
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| /* Standard Intel bus clock is fixed at 100MHz */
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| enum {
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| 	INTEL_BCLK_MHZ		= 100
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| };
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| 
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| struct cpu_info;
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| 
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| /**
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|  * cpu_common_init() - Set up common CPU init
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|  *
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|  * This reports BIST failure, enables the LAPIC, updates microcode, enables
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|  * the upper 128-bytes of CROM RAM, probes the northbridge, PCH, LPC and SATA.
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|  *
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|  * @return 0 if OK, -ve on error
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|  */
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| int cpu_common_init(void);
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| 
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| /**
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|  * cpu_set_flex_ratio_to_tdp_nominal() - Set up the maximum non-turbo rate
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|  *
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|  * If a change is needed, this function will do a soft reset so it takes
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|  * effect.
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|  *
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|  * Some details are available here:
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|  * http://forum.hwbot.org/showthread.php?t=76092
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|  *
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|  * @return 0 if OK, -ve on error
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|  */
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| int cpu_set_flex_ratio_to_tdp_nominal(void);
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| 
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| /**
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|  * cpu_intel_get_info() - Obtain CPU info for Intel CPUs
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|  *
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|  * Most Intel CPUs use the same MSR to obtain the clock speed, and use the same
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|  * features. This function fills in these values, given the value of the base
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|  * clock in MHz (typically this should be set to 100).
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|  *
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|  * @info:	cpu_info struct to fill in
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|  * @bclk_mz:	the base clock in MHz
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|  *
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|  * @return 0 always
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|  */
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| int cpu_intel_get_info(struct cpu_info *info, int bclk_mz);
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| 
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| /**
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|  * cpu_configure_thermal_target() - Set the thermal target for a CPU
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|  *
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|  * This looks up the tcc-offset property and uses it to set the
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|  * MSR_TEMPERATURE_TARGET value.
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|  *
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|  * @dev: CPU device
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|  * @return 0 if OK, -ENOENT if no target is given in device tree
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|  */
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| int cpu_configure_thermal_target(struct udevice *dev);
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| 
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| #endif
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