125 lines
		
	
	
		
			4.4 KiB
		
	
	
	
		
			C
		
	
	
	
			
		
		
	
	
			125 lines
		
	
	
		
			4.4 KiB
		
	
	
	
		
			C
		
	
	
	
| /*
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|  * Copyright (C) 2013 - ARM Ltd
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|  * Author: Marc Zyngier <marc.zyngier@arm.com>
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License version 2 as
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|  * published by the Free Software Foundation.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
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|  */
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| 
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| #ifndef __ARM_PSCI_H__
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| #define __ARM_PSCI_H__
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| 
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| #ifndef __ASSEMBLY__
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| #include <linux/bitops.h>
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| #endif
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| 
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| #define ARM_PSCI_VER_1_1		(0x00010001)
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| #define ARM_PSCI_VER_1_0		(0x00010000)
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| #define ARM_PSCI_VER_0_2		(0x00000002)
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| 
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| /* PSCI 0.1 interface */
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| #define ARM_PSCI_FN_BASE		0x95c1ba5e
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| #define ARM_PSCI_FN(n)			(ARM_PSCI_FN_BASE + (n))
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| 
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| #define ARM_PSCI_FN_CPU_SUSPEND		ARM_PSCI_FN(0)
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| #define ARM_PSCI_FN_CPU_OFF		ARM_PSCI_FN(1)
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| #define ARM_PSCI_FN_CPU_ON		ARM_PSCI_FN(2)
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| #define ARM_PSCI_FN_MIGRATE		ARM_PSCI_FN(3)
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| 
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| #define ARM_PSCI_RET_SUCCESS		0
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| #define ARM_PSCI_RET_NI			(-1)
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| #define ARM_PSCI_RET_INVAL		(-2)
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| #define ARM_PSCI_RET_DENIED		(-3)
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| #define ARM_PSCI_RET_ALREADY_ON		(-4)
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| #define ARM_PSCI_RET_ON_PENDING		(-5)
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| #define ARM_PSCI_RET_INTERNAL_FAILURE	(-6)
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| #define ARM_PSCI_RET_NOT_PRESENT	(-7)
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| #define ARM_PSCI_RET_DISABLED		(-8)
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| #define ARM_PSCI_RET_INVALID_ADDRESS	(-9)
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| 
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| /* PSCI 0.2 interface */
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| #define ARM_PSCI_0_2_FN_BASE			0x84000000
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| #define ARM_PSCI_0_2_FN(n)			(ARM_PSCI_0_2_FN_BASE + (n))
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| 
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| #define ARM_PSCI_0_2_FN64_BASE			0xC4000000
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| #define ARM_PSCI_0_2_FN64(n)			(ARM_PSCI_0_2_FN64_BASE + (n))
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| 
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| #define ARM_PSCI_0_2_FN_PSCI_VERSION		ARM_PSCI_0_2_FN(0)
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| #define ARM_PSCI_0_2_FN_CPU_SUSPEND		ARM_PSCI_0_2_FN(1)
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| #define ARM_PSCI_0_2_FN_CPU_OFF			ARM_PSCI_0_2_FN(2)
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| #define ARM_PSCI_0_2_FN_CPU_ON			ARM_PSCI_0_2_FN(3)
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| #define ARM_PSCI_0_2_FN_AFFINITY_INFO		ARM_PSCI_0_2_FN(4)
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| #define ARM_PSCI_0_2_FN_MIGRATE			ARM_PSCI_0_2_FN(5)
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| #define ARM_PSCI_0_2_FN_MIGRATE_INFO_TYPE	ARM_PSCI_0_2_FN(6)
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| #define ARM_PSCI_0_2_FN_MIGRATE_INFO_UP_CPU	ARM_PSCI_0_2_FN(7)
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| #define ARM_PSCI_0_2_FN_SYSTEM_OFF		ARM_PSCI_0_2_FN(8)
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| #define ARM_PSCI_0_2_FN_SYSTEM_RESET		ARM_PSCI_0_2_FN(9)
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| 
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| #define ARM_PSCI_0_2_FN64_CPU_SUSPEND		ARM_PSCI_0_2_FN64(1)
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| #define ARM_PSCI_0_2_FN64_CPU_ON		ARM_PSCI_0_2_FN64(3)
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| #define ARM_PSCI_0_2_FN64_AFFINITY_INFO		ARM_PSCI_0_2_FN64(4)
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| #define ARM_PSCI_0_2_FN64_MIGRATE		ARM_PSCI_0_2_FN64(5)
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| #define ARM_PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU	ARM_PSCI_0_2_FN64(7)
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| 
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| /* PSCI 1.0 interface */
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| #define ARM_PSCI_1_0_FN_PSCI_FEATURES		ARM_PSCI_0_2_FN(10)
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| #define ARM_PSCI_1_0_FN_CPU_FREEZE		ARM_PSCI_0_2_FN(11)
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| #define ARM_PSCI_1_0_FN_CPU_DEFAULT_SUSPEND	ARM_PSCI_0_2_FN(12)
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| #define ARM_PSCI_1_0_FN_NODE_HW_STATE		ARM_PSCI_0_2_FN(13)
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| #define ARM_PSCI_1_0_FN_SYSTEM_SUSPEND		ARM_PSCI_0_2_FN(14)
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| #define ARM_PSCI_1_0_FN_SET_SUSPEND_MODE	ARM_PSCI_0_2_FN(15)
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| #define ARM_PSCI_1_0_FN_STAT_RESIDENCY		ARM_PSCI_0_2_FN(16)
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| #define ARM_PSCI_1_0_FN_STAT_COUNT		ARM_PSCI_0_2_FN(17)
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| 
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| #define ARM_PSCI_1_0_FN64_CPU_DEFAULT_SUSPEND	ARM_PSCI_0_2_FN64(12)
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| #define ARM_PSCI_1_0_FN64_NODE_HW_STATE		ARM_PSCI_0_2_FN64(13)
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| #define ARM_PSCI_1_0_FN64_SYSTEM_SUSPEND	ARM_PSCI_0_2_FN64(14)
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| #define ARM_PSCI_1_0_FN64_STAT_RESIDENCY	ARM_PSCI_0_2_FN64(16)
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| #define ARM_PSCI_1_0_FN64_STAT_COUNT		ARM_PSCI_0_2_FN64(17)
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| 
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| /* PSCI 1.1 interface */
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| #define ARM_PSCI_1_1_FN64_SYSTEM_RESET2		ARM_PSCI_0_2_FN64(18)
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| 
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| /* 1KB stack per core */
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| #define ARM_PSCI_STACK_SHIFT	10
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| #define ARM_PSCI_STACK_SIZE	(1 << ARM_PSCI_STACK_SHIFT)
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| 
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| /* PSCI affinity level state returned by AFFINITY_INFO */
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| #define PSCI_AFFINITY_LEVEL_ON		0
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| #define PSCI_AFFINITY_LEVEL_OFF		1
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| #define PSCI_AFFINITY_LEVEL_ON_PENDING	2
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| 
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| #define PSCI_RESET2_TYPE_VENDOR_SHIFT	31
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| #define PSCI_RESET2_TYPE_VENDOR		BIT(PSCI_RESET2_TYPE_VENDOR_SHIFT)
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| 
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| #ifndef __ASSEMBLY__
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| #include <asm/types.h>
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| #include <linux/bitops.h>
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| 
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| /* These 3 helper functions assume cpu < CONFIG_ARMV7_PSCI_NR_CPUS */
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| u32 psci_get_target_pc(int cpu);
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| u32 psci_get_context_id(int cpu);
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| void psci_save(int cpu, u32 pc, u32 context_id);
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| 
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| void psci_cpu_entry(void);
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| u32 psci_get_cpu_id(void);
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| void psci_cpu_off_common(void);
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| 
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| int psci_update_dt(void *fdt);
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| void psci_board_init(void);
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| int fdt_psci(void *fdt);
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| 
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| void psci_v7_flush_dcache_all(void);
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| #endif /* ! __ASSEMBLY__ */
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| 
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| #endif /* __ARM_PSCI_H__ */
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