586 lines
19 KiB
C
586 lines
19 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2020 Marvell International Ltd.
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*
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* Helper functions for common, but complicated tasks.
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*/
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#ifndef __CVMX_HELPER_H__
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#define __CVMX_HELPER_H__
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#include "cvmx-wqe.h"
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/* Max number of GMXX */
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#define CVMX_HELPER_MAX_GMX \
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(OCTEON_IS_MODEL(OCTEON_CN78XX) ? \
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6 : \
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(OCTEON_IS_MODEL(OCTEON_CN68XX) ? \
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5 : \
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(OCTEON_IS_MODEL(OCTEON_CN73XX) ? \
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3 : \
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(OCTEON_IS_MODEL(OCTEON_CNF75XX) ? 1 : 2))))
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#define CVMX_HELPER_CSR_INIT0 \
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0 /* Do not change as
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CVMX_HELPER_WRITE_CSR()
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assumes it */
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#define CVMX_HELPER_CSR_INIT_READ -1
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/*
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* CVMX_HELPER_WRITE_CSR--set a field in a CSR with a value.
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*
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* @param chcsr_init initial value of the csr (CVMX_HELPER_CSR_INIT_READ
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* means to use the existing csr value as the
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* initial value.)
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* @param chcsr_csr the name of the csr
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* @param chcsr_type the type of the csr (see the -defs.h)
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* @param chcsr_chip the chip for the csr/field
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* @param chcsr_fld the field in the csr
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* @param chcsr_val the value for field
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*/
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#define CVMX_HELPER_WRITE_CSR(chcsr_init, chcsr_csr, chcsr_type, chcsr_chip, chcsr_fld, chcsr_val) \
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do { \
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chcsr_type csr; \
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if ((chcsr_init) == CVMX_HELPER_CSR_INIT_READ) \
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csr.u64 = cvmx_read_csr(chcsr_csr); \
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else \
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csr.u64 = (chcsr_init); \
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csr.chcsr_chip.chcsr_fld = (chcsr_val); \
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cvmx_write_csr((chcsr_csr), csr.u64); \
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} while (0)
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/*
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* CVMX_HELPER_WRITE_CSR0--set a field in a CSR with the initial value of 0
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*/
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#define CVMX_HELPER_WRITE_CSR0(chcsr_csr, chcsr_type, chcsr_chip, chcsr_fld, chcsr_val) \
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CVMX_HELPER_WRITE_CSR(CVMX_HELPER_CSR_INIT0, chcsr_csr, chcsr_type, chcsr_chip, chcsr_fld, \
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chcsr_val)
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/*
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* CVMX_HELPER_WRITE_CSR1--set a field in a CSR with the initial value of
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* the CSR's current value.
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*/
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#define CVMX_HELPER_WRITE_CSR1(chcsr_csr, chcsr_type, chcsr_chip, chcsr_fld, chcsr_val) \
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CVMX_HELPER_WRITE_CSR(CVMX_HELPER_CSR_INIT_READ, chcsr_csr, chcsr_type, chcsr_chip, \
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chcsr_fld, chcsr_val)
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/* These flags are passed to __cvmx_helper_packet_hardware_enable */
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typedef enum {
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CVMX_HELPER_INTERFACE_MODE_DISABLED,
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CVMX_HELPER_INTERFACE_MODE_RGMII,
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CVMX_HELPER_INTERFACE_MODE_GMII,
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CVMX_HELPER_INTERFACE_MODE_SPI,
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CVMX_HELPER_INTERFACE_MODE_PCIE,
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CVMX_HELPER_INTERFACE_MODE_XAUI,
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CVMX_HELPER_INTERFACE_MODE_SGMII,
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CVMX_HELPER_INTERFACE_MODE_PICMG,
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CVMX_HELPER_INTERFACE_MODE_NPI,
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CVMX_HELPER_INTERFACE_MODE_LOOP,
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CVMX_HELPER_INTERFACE_MODE_SRIO,
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CVMX_HELPER_INTERFACE_MODE_ILK,
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CVMX_HELPER_INTERFACE_MODE_RXAUI,
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CVMX_HELPER_INTERFACE_MODE_QSGMII,
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CVMX_HELPER_INTERFACE_MODE_AGL,
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CVMX_HELPER_INTERFACE_MODE_XLAUI,
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CVMX_HELPER_INTERFACE_MODE_XFI,
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CVMX_HELPER_INTERFACE_MODE_10G_KR,
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CVMX_HELPER_INTERFACE_MODE_40G_KR4,
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CVMX_HELPER_INTERFACE_MODE_MIXED,
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} cvmx_helper_interface_mode_t;
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typedef union cvmx_helper_link_info {
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u64 u64;
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struct {
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u64 reserved_20_63 : 43;
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u64 init_success : 1;
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u64 link_up : 1;
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u64 full_duplex : 1;
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u64 speed : 18;
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} s;
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} cvmx_helper_link_info_t;
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/**
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* Sets the back pressure configuration in internal data structure.
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* @param backpressure_dis disable/enable backpressure
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*/
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void cvmx_rgmii_set_back_pressure(u64 backpressure_dis);
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#include "cvmx-helper-fpa.h"
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#include "cvmx-helper-agl.h"
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#include "cvmx-helper-errata.h"
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#include "cvmx-helper-ilk.h"
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#include "cvmx-helper-loop.h"
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#include "cvmx-helper-npi.h"
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#include "cvmx-helper-rgmii.h"
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#include "cvmx-helper-sgmii.h"
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#include "cvmx-helper-spi.h"
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#include "cvmx-helper-srio.h"
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#include "cvmx-helper-util.h"
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#include "cvmx-helper-xaui.h"
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#include "cvmx-fpa3.h"
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enum cvmx_pko_padding {
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CVMX_PKO_PADDING_NONE = 0,
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CVMX_PKO_PADDING_60 = 1,
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};
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/**
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* cvmx_override_iface_phy_mode(int interface, int index) is a function pointer.
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* It is meant to allow customization of interfaces which do not have a PHY.
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*
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* @returns 0 if MAC decides TX_CONFIG_REG or 1 if PHY decides TX_CONFIG_REG.
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*
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* If this function pointer is NULL then it defaults to the MAC.
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*/
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extern int (*cvmx_override_iface_phy_mode) (int interface, int index);
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/**
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* cvmx_override_ipd_port_setup(int ipd_port) is a function
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* pointer. It is meant to allow customization of the IPD port/port kind
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* setup before packet input/output comes online. It is called
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* after cvmx-helper does the default IPD configuration, but
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* before IPD is enabled. Users should set this pointer to a
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* function before calling any cvmx-helper operations.
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*/
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extern void (*cvmx_override_ipd_port_setup) (int ipd_port);
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/**
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* This function enables the IPD and also enables the packet interfaces.
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* The packet interfaces (RGMII and SPI) must be enabled after the
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* IPD. This should be called by the user program after any additional
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* IPD configuration changes are made if CVMX_HELPER_ENABLE_IPD
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* is not set in the executive-config.h file.
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*
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* Return: 0 on success
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* -1 on failure
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*/
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int cvmx_helper_ipd_and_packet_input_enable_node(int node);
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int cvmx_helper_ipd_and_packet_input_enable(void);
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/**
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* Initialize and allocate memory for the SSO.
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*
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* @param wqe_entries The maximum number of work queue entries to be
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* supported.
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*
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* Return: Zero on success, non-zero on failure.
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*/
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int cvmx_helper_initialize_sso(int wqe_entries);
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/**
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* Initialize and allocate memory for the SSO on a specific node.
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*
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* @param node Node SSO to initialize
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* @param wqe_entries The maximum number of work queue entries to be
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* supported.
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*
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* Return: Zero on success, non-zero on failure.
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*/
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int cvmx_helper_initialize_sso_node(unsigned int node, int wqe_entries);
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/**
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* Undo the effect of cvmx_helper_initialize_sso().
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*
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* Return: Zero on success, non-zero on failure.
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*/
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int cvmx_helper_uninitialize_sso(void);
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/**
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* Undo the effect of cvmx_helper_initialize_sso_node().
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*
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* @param node Node SSO to initialize
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*
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* Return: Zero on success, non-zero on failure.
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*/
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int cvmx_helper_uninitialize_sso_node(unsigned int node);
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/**
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* Initialize the PIP, IPD, and PKO hardware to support
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* simple priority based queues for the ethernet ports. Each
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* port is configured with a number of priority queues based
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* on CVMX_PKO_QUEUES_PER_PORT_* where each queue is lower
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* priority than the previous.
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*
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* Return: Zero on success, non-zero on failure
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*/
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int cvmx_helper_initialize_packet_io_global(void);
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/**
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* Initialize the PIP, IPD, and PKO hardware to support
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* simple priority based queues for the ethernet ports. Each
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* port is configured with a number of priority queues based
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* on CVMX_PKO_QUEUES_PER_PORT_* where each queue is lower
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* priority than the previous.
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*
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* @param node Node on which to initialize packet io hardware
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*
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* Return: Zero on success, non-zero on failure
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*/
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int cvmx_helper_initialize_packet_io_node(unsigned int node);
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/**
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* Does core local initialization for packet io
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*
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* Return: Zero on success, non-zero on failure
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*/
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int cvmx_helper_initialize_packet_io_local(void);
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/**
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* Undo the initialization performed in
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* cvmx_helper_initialize_packet_io_global(). After calling this routine and the
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* local version on each core, packet IO for Octeon will be disabled and placed
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* in the initial reset state. It will then be safe to call the initialize
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* later on. Note that this routine does not empty the FPA pools. It frees all
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* buffers used by the packet IO hardware to the FPA so a function emptying the
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* FPA after shutdown should find all packet buffers in the FPA.
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*
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* Return: Zero on success, negative on failure.
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*/
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int cvmx_helper_shutdown_packet_io_global(void);
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/**
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* Helper function for 78xx global packet IO shutdown
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*/
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int cvmx_helper_shutdown_packet_io_global_cn78xx(int node);
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/**
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* Does core local shutdown of packet io
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*
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* Return: Zero on success, non-zero on failure
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*/
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int cvmx_helper_shutdown_packet_io_local(void);
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/**
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* Returns the number of ports on the given interface.
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* The interface must be initialized before the port count
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* can be returned.
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*
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* @param interface Which interface to return port count for.
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*
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* Return: Port count for interface
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* -1 for uninitialized interface
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*/
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int cvmx_helper_ports_on_interface(int interface);
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/**
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* Return the number of interfaces the chip has. Each interface
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* may have multiple ports. Most chips support two interfaces,
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* but the CNX0XX and CNX1XX are exceptions. These only support
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* one interface.
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*
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* Return: Number of interfaces on chip
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*/
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int cvmx_helper_get_number_of_interfaces(void);
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/**
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* Get the operating mode of an interface. Depending on the Octeon
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* chip and configuration, this function returns an enumeration
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* of the type of packet I/O supported by an interface.
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*
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* @param xiface Interface to probe
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*
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* Return: Mode of the interface. Unknown or unsupported interfaces return
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* DISABLED.
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*/
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cvmx_helper_interface_mode_t cvmx_helper_interface_get_mode(int xiface);
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/**
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* Auto configure an IPD/PKO port link state and speed. This
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* function basically does the equivalent of:
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* cvmx_helper_link_set(ipd_port, cvmx_helper_link_get(ipd_port));
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*
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* @param ipd_port IPD/PKO port to auto configure
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*
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* Return: Link state after configure
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*/
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cvmx_helper_link_info_t cvmx_helper_link_autoconf(int ipd_port);
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/**
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* Return the link state of an IPD/PKO port as returned by
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* auto negotiation. The result of this function may not match
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* Octeon's link config if auto negotiation has changed since
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* the last call to cvmx_helper_link_set().
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*
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* @param ipd_port IPD/PKO port to query
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*
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* Return: Link state
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*/
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cvmx_helper_link_info_t cvmx_helper_link_get(int ipd_port);
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/**
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* Configure an IPD/PKO port for the specified link state. This
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* function does not influence auto negotiation at the PHY level.
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* The passed link state must always match the link state returned
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* by cvmx_helper_link_get(). It is normally best to use
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* cvmx_helper_link_autoconf() instead.
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*
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* @param ipd_port IPD/PKO port to configure
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* @param link_info The new link state
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*
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* Return: Zero on success, negative on failure
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*/
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int cvmx_helper_link_set(int ipd_port, cvmx_helper_link_info_t link_info);
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/**
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* This function probes an interface to determine the actual number of
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* hardware ports connected to it. It does some setup the ports but
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* doesn't enable them. The main goal here is to set the global
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* interface_port_count[interface] correctly. Final hardware setup of
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* the ports will be performed later.
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*
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* @param xiface Interface to probe
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*
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* Return: Zero on success, negative on failure
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*/
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int cvmx_helper_interface_probe(int xiface);
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/**
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* Determine the actual number of hardware ports connected to an
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* interface. It doesn't setup the ports or enable them.
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*
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* @param xiface Interface to enumerate
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*
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* Return: Zero on success, negative on failure
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*/
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int cvmx_helper_interface_enumerate(int xiface);
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/**
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* Configure a port for internal and/or external loopback. Internal loopback
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* causes packets sent by the port to be received by Octeon. External loopback
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* causes packets received from the wire to sent out again.
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*
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* @param ipd_port IPD/PKO port to loopback.
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* @param enable_internal
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* Non zero if you want internal loopback
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* @param enable_external
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* Non zero if you want external loopback
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*
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* Return: Zero on success, negative on failure.
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*/
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int cvmx_helper_configure_loopback(int ipd_port, int enable_internal, int enable_external);
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/**
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* Returns the number of ports on the given interface.
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*
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* @param interface Which interface to return port count for.
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*
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* Return: Port count for interface
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* -1 for uninitialized interface
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*/
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int __cvmx_helper_early_ports_on_interface(int interface);
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void cvmx_helper_setup_simulator_io_buffer_counts(int node, int num_packet_buffers,
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int pko_buffers);
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void cvmx_helper_set_wqe_no_ptr_mode(bool mode);
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void cvmx_helper_set_pkt_wqe_le_mode(bool mode);
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int cvmx_helper_shutdown_fpa_pools(int node);
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/**
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* Convert Ethernet QoS/PCP value to system-level priority
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*
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* In OCTEON, highest priority is 0, in Ethernet 802.1p PCP field
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* the highest priority is 7, lowest is 1. Here is the full conversion
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* table between QoS (PCP) and OCTEON priority values, per IEEE 802.1Q-2005:
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*
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* PCP Priority Acronym Traffic Types
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* 1 7 (lowest) BK Background
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* 0 6 BE Best Effort
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* 2 5 EE Excellent Effort
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* 3 4 CA Critical Applications
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* 4 3 VI Video, < 100 ms latency and jitter
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* 5 2 VO Voice, < 10 ms latency and jitter
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* 6 1 IC Internetwork Control
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* 7 0 (highest) NC Network Control
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*/
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static inline u8 cvmx_helper_qos2prio(u8 qos)
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{
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static const unsigned int pcp_map = 6 << (4 * 0) | 7 << (4 * 1) | 5 << (4 * 2) |
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4 << (4 * 3) | 3 << (4 * 4) | 2 << (4 * 5) |
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1 << (4 * 6) | 0 << (4 * 7);
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return (pcp_map >> ((qos & 0x7) << 2)) & 0x7;
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}
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/**
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* Convert system-level priority to Ethernet QoS/PCP value
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*
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* Calculate the reverse of cvmx_helper_qos2prio() per IEEE 802.1Q-2005.
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*/
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static inline u8 cvmx_helper_prio2qos(u8 prio)
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{
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static const unsigned int prio_map = 7 << (4 * 0) | 6 << (4 * 1) | 5 << (4 * 2) |
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4 << (4 * 3) | 3 << (4 * 4) | 2 << (4 * 5) |
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0 << (4 * 6) | 1 << (4 * 7);
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return (prio_map >> ((prio & 0x7) << 2)) & 0x7;
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}
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/**
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* @INTERNAL
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* Get the number of ipd_ports on an interface.
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*
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* @param xiface
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*
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* Return: the number of ipd_ports on the interface and -1 for error.
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*/
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int __cvmx_helper_get_num_ipd_ports(int xiface);
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enum cvmx_pko_padding __cvmx_helper_get_pko_padding(int xiface);
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/**
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* @INTERNAL
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*
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* @param xiface
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* @param num_ipd_ports is the number of ipd_ports on the interface
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* @param has_fcs indicates if PKO does FCS for the ports on this
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* @param pad The padding that PKO should apply.
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* interface.
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*
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* Return: 0 for success and -1 for failure
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*/
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int __cvmx_helper_init_interface(int xiface, int num_ipd_ports, int has_fcs,
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enum cvmx_pko_padding pad);
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void __cvmx_helper_shutdown_interfaces(void);
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/*
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* @INTERNAL
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* Enable packet input/output from the hardware. This function is
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* called after all internal setup is complete and IPD is enabled.
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* After this function completes, packets will be accepted from the
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* hardware ports. PKO should still be disabled to make sure packets
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* aren't sent out partially setup hardware.
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*
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* Return: Zero on success, negative on failure
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*/
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int __cvmx_helper_packet_hardware_enable(int xiface);
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/*
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* @INTERNAL
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*
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* Return: 0 for success and -1 for failure
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*/
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int __cvmx_helper_set_link_info(int xiface, int index, cvmx_helper_link_info_t link_info);
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/**
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* @INTERNAL
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*
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* @param xiface
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* @param port
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*
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* Return: valid link_info on success or -1 on failure
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*/
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cvmx_helper_link_info_t __cvmx_helper_get_link_info(int xiface, int port);
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/**
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* @INTERNAL
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*
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* @param xiface
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*
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* Return: 0 if PKO does not do FCS and 1 otherwise.
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*/
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int __cvmx_helper_get_has_fcs(int xiface);
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void *cvmx_helper_mem_alloc(int node, u64 alloc_size, u64 align);
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void cvmx_helper_mem_free(void *buffer, u64 size);
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#define CVMX_QOS_NUM 8 /* Number of QoS priority classes */
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typedef enum {
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CVMX_QOS_PROTO_NONE, /* Disable QOS */
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CVMX_QOS_PROTO_PAUSE, /* IEEE 802.3 PAUSE */
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CVMX_QOS_PROTO_PFC /* IEEE 802.1Qbb-2011 PFC/CBFC */
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} cvmx_qos_proto_t;
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typedef enum {
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CVMX_QOS_PKT_MODE_HWONLY, /* PAUSE packets processed in Hardware only. */
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CVMX_QOS_PKT_MODE_SWONLY, /* PAUSE packets processed in Software only. */
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CVMX_QOS_PKT_MODE_HWSW, /* PAUSE packets processed in both HW and SW. */
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CVMX_QOS_PKT_MODE_DROP /* Ignore PAUSE packets. */
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} cvmx_qos_pkt_mode_t;
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typedef enum {
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CVMX_QOS_POOL_PER_PORT, /* Pool per Physical Port */
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CVMX_QOS_POOL_PER_CLASS /* Pool per Priority Class */
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} cvmx_qos_pool_mode_t;
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typedef struct cvmx_qos_config {
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cvmx_qos_proto_t qos_proto; /* QoS protocol.*/
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cvmx_qos_pkt_mode_t pkt_mode; /* PAUSE processing mode.*/
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cvmx_qos_pool_mode_t pool_mode; /* FPA Pool mode.*/
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int pktbuf_size; /* Packet buffer size */
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int aura_size; /* Number of buffers */
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int drop_thresh[CVMX_QOS_NUM]; /* DROP threashold in % */
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int red_thresh[CVMX_QOS_NUM]; /* RED threashold in % */
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int bp_thresh[CVMX_QOS_NUM]; /* BP threashold in % */
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int groups[CVMX_QOS_NUM]; /* Base SSO group for QOS group set. */
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int group_prio[CVMX_QOS_NUM]; /* SSO group priorities.*/
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int pko_pfc_en; /* Enable PKO PFC layout. */
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int vlan_num; /* VLAN number: 0 = 1st or 1 = 2nd. */
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int p_time; /* PAUSE packets send time (in number of 512 bit-times).*/
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|
int p_interval; /* PAUSE packet send interval (in number of 512 bit-times).*/
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|
/* Internal parameters (should not be used by application developer): */
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|
cvmx_fpa3_pool_t gpools[CVMX_QOS_NUM]; /* Pool to use.*/
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|
cvmx_fpa3_gaura_t gauras[CVMX_QOS_NUM]; /* Global auras -- one per priority class. */
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|
int bpids[CVMX_QOS_NUM]; /* PKI BPID.*/
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|
int qpg_base; /* QPG Table base index.*/
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|
} cvmx_qos_config_t;
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|
|
|
/**
|
|
* Initialize QoS configuraiton with the SDK defaults.
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|
*
|
|
* @param qos_cfg User QOS configuration parameters.
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|
* Return: Zero on success, negative number otherwise.
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|
*/
|
|
int cvmx_helper_qos_config_init(cvmx_qos_proto_t qos_proto, cvmx_qos_config_t *qos_cfg);
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|
|
|
/**
|
|
* Update the user static processor configuration.
|
|
* It should be done before any initialization of the DP units is performed.
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|
*
|
|
* @param xipdport Global IPD port
|
|
* @param qos_cfg User QOS configuration parameters.
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|
* Return: Zero on success, negative number otherwise.
|
|
*/
|
|
int cvmx_helper_qos_port_config_update(int xipdport, cvmx_qos_config_t *qos_cfg);
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|
|
|
/**
|
|
* Configure the Data Path components for QOS function.
|
|
* This function is called after the global processor initialization is
|
|
* performed.
|
|
*
|
|
* @param xipdport Global IPD port
|
|
* @param qos_cfg User QOS configuration parameters.
|
|
* Return: Zero on success, negative number otherwise.
|
|
*/
|
|
int cvmx_helper_qos_port_setup(int xipdport, cvmx_qos_config_t *qos_cfg);
|
|
|
|
/**
|
|
* Configure the SSO for QOS function.
|
|
* This function is called after the global processor initialization is
|
|
* performed.
|
|
*
|
|
* @param node OCTEON3 node number.
|
|
* @param qos_cfg User QOS configuration parameters.
|
|
* Return: Zero on success, negative number otherwise.
|
|
*/
|
|
int cvmx_helper_qos_sso_setup(int node, cvmx_qos_config_t *qos_cfg);
|
|
|
|
/**
|
|
* Return PKI_CHAN_E channel name based on the provided index.
|
|
* @param chan Channel index.
|
|
* @param namebuf Name buffer (output).
|
|
* @param buflen Name maximum length.
|
|
* Return: Length of name (in bytes) on success, negative number otherwise.
|
|
*/
|
|
int cvmx_helper_get_chan_e_name(int chan, char *namebuf, int buflen);
|
|
|
|
#ifdef CVMX_DUMP_DIAGNOSTICS
|
|
void cvmx_helper_dump_for_diagnostics(int node);
|
|
#endif
|
|
|
|
#endif /* __CVMX_HELPER_H__ */
|