97 lines
2.5 KiB
C
97 lines
2.5 KiB
C
/* SPARC I/O definitions
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*
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* (C) Copyright 2007, 2015
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* Daniel Hellstrom, Cobham Gaisler, daniel@gaisler.com.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef _SPARC_IO_H
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#define _SPARC_IO_H
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/* Nothing to sync, total store ordering (TSO)... */
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#define sync()
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/*
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* Generic virtual read/write.
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*/
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#ifndef CONFIG_SYS_HAS_NO_CACHE
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/* Forces a cache miss on read/load.
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* On some architectures we need to bypass the cache when reading
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* I/O registers so that we are not reading the same status word
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* over and over again resulting in a hang (until an IRQ if lucky)
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*/
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#define __arch_getb(a) SPARC_NOCACHE_READ_BYTE((unsigned int)(a))
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#define __arch_getw(a) SPARC_NOCACHE_READ_HWORD((unsigned int)(a))
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#define __arch_getl(a) SPARC_NOCACHE_READ((unsigned int)(a))
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#define __arch_getq(a) SPARC_NOCACHE_READ_DWORD((unsigned int)(a))
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#else
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#define __arch_getb(a) (*(volatile unsigned char *)(a))
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#define __arch_getw(a) (*(volatile unsigned short *)(a))
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#define __arch_getl(a) (*(volatile unsigned int *)(a))
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#define __arch_getq(a) (*(volatile unsigned long long *)(a))
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#endif /* CONFIG_SYS_HAS_NO_CACHE */
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#define __arch_putb(v, a) (*(volatile unsigned char *)(a) = (v))
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#define __arch_putw(v, a) (*(volatile unsigned short *)(a) = (v))
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#define __arch_putl(v, a) (*(volatile unsigned int *)(a) = (v))
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#define __arch_putq(v, a) (*(volatile unsigned long long *)(a) = (v))
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#define __raw_writeb(v, a) __arch_putb(v, a)
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#define __raw_writew(v, a) __arch_putw(v, a)
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#define __raw_writel(v, a) __arch_putl(v, a)
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#define __raw_writeq(v, a) __arch_putq(v, a)
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#define __raw_readb(a) __arch_getb(a)
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#define __raw_readw(a) __arch_getw(a)
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#define __raw_readl(a) __arch_getl(a)
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#define __raw_readq(a) __arch_getq(a)
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#define writeb __raw_writeb
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#define writew __raw_writew
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#define writel __raw_writel
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#define writeq __raw_writeq
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#define readb __raw_readb
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#define readw __raw_readw
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#define readl __raw_readl
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#define readq __raw_readq
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/*
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* Given a physical address and a length, return a virtual address
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* that can be used to access the memory range with the caching
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* properties specified by "flags".
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*/
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#define MAP_NOCACHE (0)
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#define MAP_WRCOMBINE (0)
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#define MAP_WRBACK (0)
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#define MAP_WRTHROUGH (0)
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static inline void *map_physmem(phys_addr_t paddr, unsigned long len,
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unsigned long flags)
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{
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return (void *)paddr;
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}
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/*
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* Take down a mapping set up by map_physmem().
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*/
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static inline void unmap_physmem(void *vaddr, unsigned long flags)
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{
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}
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static inline phys_addr_t virt_to_phys(void * vaddr)
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{
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return (phys_addr_t)(vaddr);
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}
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#endif
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