32 lines
876 B
C
32 lines
876 B
C
/*
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* Copyright (C) Marvell International Ltd. and its affiliates
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#ifndef _DDR3_TRAINING_IP_STATIC_H_
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#define _DDR3_TRAINING_IP_STATIC_H_
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#include "ddr3_training_ip_def.h"
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#include "ddr3_training_ip.h"
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struct trip_delay_element {
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u32 dqs_delay; /* DQS delay (m_sec) */
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u32 ck_delay; /* CK Delay (m_sec) */
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};
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struct hws_tip_static_config_info {
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u32 silicon_delay;
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struct trip_delay_element *package_trace_arr;
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struct trip_delay_element *board_trace_arr;
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};
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int ddr3_tip_run_static_alg(u32 dev_num, enum hws_ddr_freq freq);
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int ddr3_tip_init_static_config_db(
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u32 dev_num, struct hws_tip_static_config_info *static_config_info);
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int ddr3_tip_init_specific_reg_config(u32 dev_num,
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struct reg_data *reg_config_arr);
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int ddr3_tip_static_phy_init_controller(u32 dev_num);
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#endif /* _DDR3_TRAINING_IP_STATIC_H_ */
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