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u-boot/arch/riscv/include/asm
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Rick Chen 52923c6db7 riscv: cache: Implement i/dcache [status, enable, disable] 
AndeStar RISC-V(V5) provide mcache_ctl register which
can configure I/D cache as enabled or disabled.

This CSR will be encapsulated by CONFIG_RISCV_NDS.
If you want to configure cache on AndeStar V5
AE350 platform. YOu can enable [*] AndeStar V5 ISA support
by make menuconfig.

This approach also provide the expansion when the
vender specific features are going to join in.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
 		2018-11-26 13:58:01 +08:00
..
barrier.h riscv: make use of the barrier functions from Linux 2018-11-26 13:57:30 +08:00
bitops.h riscv: Define PLATFORM__CLEAR_BIT for generic_clear_bit() 2018-05-15 21:44:05 -04:00
byteorder.h
…
cache.h riscv: cache: Implement i/dcache [status, enable, disable] 2018-11-26 13:58:01 +08:00
config.h SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
csr.h Use _AC and UL macros from linux/const.h 2018-11-20 13:08:15 +01:00
encoding.h riscv: Remove CSR read/write defines in encoding.h 2018-10-03 17:48:02 +08:00
global_data.h SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
io.h riscv: do not reimplement generic io functions 2018-11-26 13:57:30 +08:00
linkage.h SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
posix_types.h riscv: fix use of incorrectly sized variables 2018-11-26 13:57:29 +08:00
processor.h
…
ptrace.h riscv: checkpatch: Fix alignment should match open parenthesis 2018-03-30 13:13:22 +08:00
sections.h SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
setjmp.h SPDX: Convert single license tags to Linux Kernel style 2018-05-29 14:44:21 +08:00
string.h
…
system.h SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
types.h riscv: fix use of incorrectly sized variables 2018-11-26 13:57:29 +08:00
u-boot-riscv.h riscv: Add board_quiesce_devices stub 2018-05-29 14:43:12 +08:00
u-boot.h riscv: Remove mach type 2018-10-03 17:47:19 +08:00
unaligned.h
…