593 lines
14 KiB
Plaintext
593 lines
14 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
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*/
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/dts-v1/;
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#include <dt-bindings/mux/ti-serdes.h>
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#include <dt-bindings/phy/phy.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/net/ti-dp83867.h>
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#include "k3-am642.dtsi"
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/ {
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compatible = "netmodule,hw34", "ti,am642";
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model = "NetModule AM642 based Gemini";
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aliases {
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i2c0 = &main_i2c0;
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i2c1 = &main_i2c1;
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i2c2 = &main_i2c2;
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};
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chosen {
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stdout-path = "serial2:115200n8";
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bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
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};
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memory@80000000 {
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device_type = "memory";
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/* 1G RAM */
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reg = <0x00000000 0x80000000 0x00000000 0x40000000>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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secure_ddr: optee@9e800000 {
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reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
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alignment = <0x1000>;
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no-map;
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};
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main_r5fss0_core0_dma_memory_region: r5f-dma-memory@a0000000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0xa0000000 0x00 0x100000>;
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no-map;
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};
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main_r5fss0_core0_memory_region: r5f-memory@a0100000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0xa0100000 0x00 0xf00000>;
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no-map;
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};
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main_r5fss0_core1_dma_memory_region: r5f-dma-memory@a1000000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0xa1000000 0x00 0x100000>;
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no-map;
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};
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main_r5fss0_core1_memory_region: r5f-memory@a1100000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0xa1100000 0x00 0xf00000>;
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no-map;
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};
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main_r5fss1_core0_dma_memory_region: r5f-dma-memory@a2000000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0xa2000000 0x00 0x100000>;
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no-map;
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};
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main_r5fss1_core0_memory_region: r5f-memory@a2100000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0xa2100000 0x00 0xf00000>;
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no-map;
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};
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main_r5fss1_core1_dma_memory_region: r5f-dma-memory@a3000000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0xa3000000 0x00 0x100000>;
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no-map;
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};
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main_r5fss1_core1_memory_region: r5f-memory@a3100000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0xa3100000 0x00 0xf00000>;
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no-map;
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};
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rtos_ipc_memory_region: ipc-memories@a5000000 {
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reg = <0x00 0xa5000000 0x00 0x00800000>;
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alignment = <0x1000>;
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no-map;
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};
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};
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config {
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u-boot,mmc-env-offset = <0x3e0000>; /* 4MB partition, we put it into the last 128 kB */
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};
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gemini-sysreset {
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compatible = "gemini-sysreset";
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};
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};
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&main_pmx0 {
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main_mmc1_pins_default: main-mmc1-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x0294, PIN_INPUT, 0) /* (J19) MMC1_CMD */
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AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* (#N/A) MMC1_CLKLB */
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AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */
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AM64X_IOPAD(0x0288, PIN_INPUT, 0) /* (K21) MMC1_DAT0 */
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AM64X_IOPAD(0x0284, PIN_INPUT, 0) /* (L21) MMC1_DAT1 */
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AM64X_IOPAD(0x0280, PIN_INPUT, 0) /* (K19) MMC1_DAT2 */
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AM64X_IOPAD(0x027c, PIN_INPUT, 0) /* (K18) MMC1_DAT3 */
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AM64X_IOPAD(0x0298, PIN_INPUT, 0) /* (D19) MMC1_SDCD */
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>;
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};
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main_uart0_pins_default: main-uart0-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */
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AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */
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>;
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};
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gpio0_pins: gpio0-pins {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x0090, PIN_OUTPUT, 7) /* (P17) GPIO0_35 */
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AM64X_IOPAD(0x008C, PIN_INPUT, 7) /* (T21) GPIO0_34 */
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AM64X_IOPAD(0x00A0, PIN_OUTPUT, 7) /* (N16) GPIO0_39 */
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AM64X_IOPAD(0x0098, PIN_INPUT, 7) /* (W19) GPIO0_37 */
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AM64X_IOPAD(0x009C, PIN_INPUT, 7) /* (Y18) GPIO0_38 */
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AM64X_IOPAD(0x0094, PIN_INPUT, 7) /* (Y19) GPIO0_36 */
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AM64X_IOPAD(0x00A8, PIN_INPUT, 7) /* (R19) GPIO0_41 */
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AM64X_IOPAD(0x00AC, PIN_INPUT, 7) /* (R20) GPIO0_42 */
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AM64X_IOPAD(0x00A4, PIN_INPUT, 7) /* (N17) GPIO0_40 */
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AM64X_IOPAD(0x011c, PIN_INPUT, 7) /* (AA13) GPIO0_70 */
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AM64X_IOPAD(0x0128, PIN_OUTPUT, 7) /* (U12) GPIO0_73 */
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AM64X_IOPAD(0x0150, PIN_INPUT, 7) /* (Y13) GPIO0_20 */
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AM64X_IOPAD(0x0154, PIN_INPUT, 7) /* (V12) GPIO0_84 */
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AM64X_IOPAD(0x00d8, PIN_INPUT, 7) /* (W13) GPIO0_53 */
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AM64X_IOPAD(0x00cc, PIN_INPUT, 7) /* (V13) GPIO0_50 */
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AM64X_IOPAD(0x0124, PIN_OUTPUT, 7) /* (V15) GPIO0_72 */
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AM64X_IOPAD(0x012c, PIN_OUTPUT, 7) /* (V14) GPIO0_74 */
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AM64X_IOPAD(0x0130, PIN_INPUT, 7) /* (W14) GPIO0_75 */
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AM64X_IOPAD(0x014c, PIN_OUTPUT, 7) /* (AA14) GPIO0_19 */
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AM64X_IOPAD(0x00e0, PIN_OUTPUT, 7) /* (U14) GPIO0_55 */
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AM64X_IOPAD(0x00dc, PIN_OUTPUT, 7) /* (U15) GPIO0_54 */
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AM64X_IOPAD(0x0114, PIN_INPUT, 7) /* (Y12) GPIO0_68 */
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AM64X_IOPAD(0x0118, PIN_OUTPUT, 7) /* (W12) GPIO0_69 */
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AM64X_IOPAD(0x00bc, PIN_INPUT, 7) /* (U8) GPIO0_46 */
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AM64X_IOPAD(0x00c0, PIN_OUTPUT, 7) /* (W8) GPIO0_47 */
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AM64X_IOPAD(0x00c4, PIN_OUTPUT, 7) /* (W8) GPIO0_48 */
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AM64X_IOPAD(0x00c8, PIN_OUTPUT, 7) /* (W8) GPIO0_49 */
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AM64X_IOPAD(0x00fc, PIN_INPUT, 7) /* (U7) GPIO0_62 */
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AM64X_IOPAD(0x002c, PIN_OUTPUT, 7) /* (L19) GPIO0_11 */
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AM64X_IOPAD(0x0030, PIN_OUTPUT, 7) /* (L18) GPIO0_12 */
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AM64X_IOPAD(0x0034, PIN_OUTPUT, 7) /* (K17) GPIO0_13 */
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AM64X_IOPAD(0x0038, PIN_OUTPUT, 7) /* (L17) GPIO0_14 */
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AM64X_IOPAD(0x0014, PIN_OUTPUT, 7) /* (M20) GPIO0_5 */
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AM64X_IOPAD(0x0018, PIN_OUTPUT, 7) /* (M21) GPIO0_6 */
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AM64X_IOPAD(0x001c, PIN_OUTPUT, 7) /* (P21) GPIO0_7 */
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AM64X_IOPAD(0x0020, PIN_OUTPUT, 7) /* (P20) GPIO0_8 */
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AM64X_IOPAD(0x0024, PIN_OUTPUT, 7) /* (N18) GPIO0_9 */
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AM64X_IOPAD(0x0028, PIN_OUTPUT, 7) /* (M17) GPIO0_10 */
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>;
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};
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gpio1_pins: gpio1-pins {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x01a8, PIN_OUTPUT, 7) /* (V1) PRG0_PRU0_GPO18.GPIO1_18 */
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AM64X_IOPAD(0x01ac, PIN_OUTPUT, 7) /* (W1) PRG0_PRU0_GPO19.GPIO1_19 */
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>;
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};
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main_i2c2_pins_default: main-i2c2-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x00B0, PIN_INPUT, 1) /* (P19) I2C2_SCL */
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AM64X_IOPAD(0x00B4, PIN_INPUT, 1) /* (R21) I2C2_SDA */
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>;
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};
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rmii1_pins_default: rmii1-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x01cc, PIN_INPUT, 5) /* (W5) PRG0_PRU1_GPO7.RMII1_RD0 */
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AM64X_IOPAD(0x01d4, PIN_INPUT, 5) /* (Y5) PRG0_PRU1_GPO9.RMII1_RD1 */
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AM64X_IOPAD(0x01d8, PIN_OUTPUT, 5) /* (V6) PRG0_PRU1_GPO10.RMII1_TD0 */
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AM64X_IOPAD(0x01f4, PIN_OUTPUT, 5) /* (V5) PRG0_PRU1_GPO17.RMII1_TD1 */
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AM64X_IOPAD(0x01fc, PIN_INPUT, 5) /* (R2) PRG0_PRU1_GPO17.RMII1_CRS_DV*/
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AM64X_IOPAD(0x01f8, PIN_INPUT, 5) /* (P5) PRG0_PRU1_GPO17.RMII1_TX_EN */
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AM64X_IOPAD(0x0188, PIN_INPUT, 5) /* (AA5) PRG0_PRU0_GPO10.RMII1_REF_CLK*/
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AM64X_IOPAD(0x00d4, PIN_OUTPUT, 5) /* (U13) CLKOUT0 */
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>;
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};
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mdio0_pins_default: mdio0-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x015c, PIN_OUTPUT_PULLUP, 4) /* (Y6) PRG1_MDIO0_MDC.MDIO0_MDC */
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AM64X_IOPAD(0x0158, PIN_INPUT, 4) /* (AA6) PRG1_MDIO0_MDIO.MDIO0_MDIO */
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AM64X_IOPAD(0x01ac, PIN_OUTPUT_PULLUP, 7) /* (W1) GPIO1_19 */
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>;
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};
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main_usb0_pins_default: main-usb0-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */
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>;
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};
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main_i2c1_pins_default: main-i2c1-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */
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AM64X_IOPAD(0x026c, PIN_INPUT_PULLUP, 0) /* (B19) I2C1_SDA */
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>;
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};
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main_i2c0_pins_default: main-i2c0-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (P19) I2C2_SCL */
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AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (R21) I2C2_SDA */
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>;
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};
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};
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&usbss0 {
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ti,vbus-divider;
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ti,usb2-only;
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};
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&usb0 {
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dr_mode = "otg";
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maximum-speed = "high-speed";
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pinctrl-names = "default";
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pinctrl-0 = <&main_usb0_pins_default>;
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};
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&main_i2c0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&main_i2c0_pins_default>;
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clock-frequency = <100000>;
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da9063: pmic@58 {
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compatible = "dlg,da9063";
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reg = <0x58>;
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regulators {
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vddcore_reg: bcore1 {
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <850000>;
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regulator-ramp-delay = <2>;
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regulator-name = "DA9063_CORE";
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regulator-always-on;
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};
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vddar_reg: bcore2 {
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <850000>;
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regulator-ramp-delay = <2>;
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regulator-name = "DA9063_AR";
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regulator-always-on;
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};
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vdd_1v8_reg: bperi {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-ramp-delay = <2>;
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regulator-always-on;
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};
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vdd_3v3_1_reg: bio {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vdd_3v3_2_reg: bmem {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vdd_1v1_reg: bpro {
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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regulator-always-on;
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};
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vdd_gnss_reg: ldo3 {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vdd_sensors_reg: ldo5 {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vdd_stby_reg: ldo6 {
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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};
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vdd_vdda: ldo10 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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regulator-boot-on;
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};
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vdd_5v_can_reg: ldo11 {
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/* It is actually 5V but the driver does not support it */
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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regulator-boot-on;
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};
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};
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};
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};
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/* SYS_I2C */
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&main_i2c1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&main_i2c1_pins_default>;
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clock-frequency = <400000>;
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/* There is no driver available */
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onewire: ds2484@18 {
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status = "disabled";
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reg = <0x18>;
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};
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eeprom: eeprom@50 {
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reg = <0x50>;
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compatible = "onsemi,24c64";
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};
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temp: temp@48 {
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reg = <0x48>;
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compatible = "national,lm75";
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/* vs-supply = <&vs>; */ /* Not available, maybe required then use fixed-regulator */
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};
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};
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/* USER_I2C */
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&main_i2c2 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&main_i2c2_pins_default>;
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clock-frequency = <400000>;
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exp1: gpio@71 {
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status = "okay";
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compatible = "nxp,pca9538";
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reg = <0x71>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-line-names = "GPI_CTRL_PU_EN0", "GPI_CTRL_PU_EN1",
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"GPI_CTRL_PU_EN2", "GPI_CTRL_PU_EN3",
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"GPI_CTRL_PU_EN4", "GPI_CTRL_PU_EN5",
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"", "";
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};
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exp2: gpio@72 {
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status = "okay";
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compatible = "nxp,pca9538";
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reg = <0x73>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-line-names = "GPIO0", "GPIO1",
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"GPIO2", "GPIO3",
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"GPO0", "GPO1",
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"GPO2", "GPO3";
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};
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};
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&sdhci0 {
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/* emmc */
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bus-width = <8>;
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non-removable;
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ti,driver-strength-ohm = <50>;
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disable-wp;
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/delete-property/ ti,otap-del-sel-hs200;
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/delete-property/ ti,otap-del-sel-hs400;
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};
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&sdhci1 {
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status = "disabled";
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};
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&cpsw3g {
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pinctrl-names = "default";
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pinctrl-0 = <&rmii1_pins_default>;
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status = "okay";
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};
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&cpsw_port1 {
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phy-mode = "rmii";
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phy-handle = <&cpsw3g_phy0>;
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status = "okay";
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};
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&cpsw3g_mdio {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mdio0_pins_default>;
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cpsw3g_phy0: ethernet-phy@1 {
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reg = <0x01>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
|
};
|
|
};
|
|
|
|
&main_gpio0 {
|
|
status = "okay";
|
|
ti,ngpio = <87>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&gpio0_pins>;
|
|
|
|
wlan_en {
|
|
gpio-hog;
|
|
gpios = <5 GPIO_ACTIVE_HIGH>;
|
|
output-high;
|
|
line-name = "WLAN_EN";
|
|
};
|
|
|
|
canfd0_en {
|
|
gpio-hog;
|
|
gpios = <74 GPIO_ACTIVE_HIGH>;
|
|
output-high;
|
|
line-name = "CANFD0_CTRL_EN";
|
|
};
|
|
|
|
canfd1_en {
|
|
gpio-hog;
|
|
gpios = <72 GPIO_ACTIVE_HIGH>;
|
|
output-high;
|
|
line-name = "CANFD1_CTRL_EN";
|
|
};
|
|
|
|
canfd0_stb {
|
|
gpio-hog;
|
|
gpios = <55 GPIO_ACTIVE_HIGH>;
|
|
output-low;
|
|
/* In V1 this is high active even though it is STB~ */
|
|
line-name = "CANFD0_CTRL_STB";
|
|
};
|
|
|
|
canfd1_stb {
|
|
gpio-hog;
|
|
gpios = <54 GPIO_ACTIVE_HIGH>;
|
|
output-low;
|
|
/* In V1 this is high active even though it is STB~ */
|
|
line-name = "CANFD1_CTRL_STB";
|
|
};
|
|
|
|
xpdr_rst {
|
|
gpio-hog;
|
|
gpios = <34 GPIO_ACTIVE_LOW>;
|
|
output-low;
|
|
line-name = "XPDR_RST";
|
|
};
|
|
|
|
hub_rst {
|
|
gpio-hog;
|
|
gpios = <19 GPIO_ACTIVE_HIGH>;
|
|
output-high;
|
|
line-name = "HUB_RST";
|
|
};
|
|
|
|
gnss_rst {
|
|
gpio-hog;
|
|
gpios = <39 GPIO_ACTIVE_HIGH>;
|
|
output-low;
|
|
line-name = "GNSS_RST";
|
|
};
|
|
};
|
|
|
|
&main_gpio1 {
|
|
status = "okay";
|
|
ti,ngpio = <88>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&gpio1_pins>;
|
|
|
|
brdr_rst {
|
|
gpio-hog;
|
|
gpios = <18 GPIO_ACTIVE_HIGH>;
|
|
output-high;
|
|
line-name = "BRDR_RST";
|
|
};
|
|
|
|
eth_rst {
|
|
gpio-hog;
|
|
gpios = <19 GPIO_ACTIVE_HIGH>;
|
|
output-high;
|
|
line-name = "ETH_RST";
|
|
};
|
|
};
|
|
|
|
&mailbox0_cluster2 {
|
|
mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
|
|
ti,mbox-rx = <0 0 2>;
|
|
ti,mbox-tx = <1 0 2>;
|
|
};
|
|
|
|
mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
|
|
ti,mbox-rx = <2 0 2>;
|
|
ti,mbox-tx = <3 0 2>;
|
|
};
|
|
};
|
|
|
|
&mailbox0_cluster3 {
|
|
status = "disabled";
|
|
};
|
|
|
|
&mailbox0_cluster4 {
|
|
mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
|
|
ti,mbox-rx = <0 0 2>;
|
|
ti,mbox-tx = <1 0 2>;
|
|
};
|
|
|
|
mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
|
|
ti,mbox-rx = <2 0 2>;
|
|
ti,mbox-tx = <3 0 2>;
|
|
};
|
|
};
|
|
|
|
&mailbox0_cluster5 {
|
|
status = "disabled";
|
|
};
|
|
|
|
&mailbox0_cluster6 {
|
|
mbox_m4_0: mbox-m4-0 {
|
|
ti,mbox-rx = <0 0 2>;
|
|
ti,mbox-tx = <1 0 2>;
|
|
};
|
|
};
|
|
|
|
&mailbox0_cluster7 {
|
|
status = "disabled";
|
|
};
|
|
|
|
&main_r5fss0_core0 {
|
|
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
|
|
memory-region = <&main_r5fss0_core0_dma_memory_region>,
|
|
<&main_r5fss0_core0_memory_region>;
|
|
};
|
|
|
|
&main_r5fss0_core1 {
|
|
mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
|
|
memory-region = <&main_r5fss0_core1_dma_memory_region>,
|
|
<&main_r5fss0_core1_memory_region>;
|
|
};
|
|
|
|
&main_r5fss1_core0 {
|
|
mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
|
|
memory-region = <&main_r5fss1_core0_dma_memory_region>,
|
|
<&main_r5fss1_core0_memory_region>;
|
|
};
|
|
|
|
&main_r5fss1_core1 {
|
|
mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
|
|
memory-region = <&main_r5fss1_core1_dma_memory_region>,
|
|
<&main_r5fss1_core1_memory_region>;
|
|
};
|
|
|
|
#include "k3-am642-gemini-u-boot.dtsi"
|