The current code uses clrbits_be32 which is incorrect since we are on a little endian machine here. This patch fixes this issue and also removes some unnecessary code: Reading the current GPIO bank state is not required if we are using the SET and CLEAR GPIO registers for setting/clearing bits. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com> Cc: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> |
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| da8xxevm | ||
| dm355evm | ||
| dm355leopard | ||
| dm365evm | ||
| dm6467evm | ||
| dvevm | ||
| ea20 | ||
| schmoogie | ||
| sffsdr | ||
| sonata | ||