Stratix 10 maps dram from 0 to 128GB. There is a 2GB hole in the memory for peripherals and other IO from 2GB to 4GB. However the dram controller ignores upper address bits for smaller dram configurations. Example: a 4GB dram maps to multiple locations, every 4GB on the address. Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| sdram_arria10.c | ||
| sdram_gen5.c | ||
| sdram_s10.c | ||
| sequencer.c | ||
| sequencer.h | ||